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arXiv · 1210.0956

A Semiconductor Under Insulator Technology in Indium Phosphide

Khaled Mnaymneh·Dan Dalacu·Simon Frédérick·Jean Lapointe·Philip J. Poole·Robin L. Williams
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Abstract

This Letter introduces a Semiconductor-Under-Insulator (SUI) technology in InP for designing strip waveguides that interface InP photonic crystal membrane structures. Strip waveguides in InP-SUI are supported under an atomic layer deposited insulator layer in contrast to strip waveguides in silicon supported on insulator. We show a substantial improvement in optical transmission when using InP-SUI strip waveguides interfaced with localized photonic crystal membrane structures when compared with extended photonic crystal waveguide membranes. Furthermore, SUI makes available various fiber-coupling techniques used in SOI, such as sub-micron coupling, for planar membrane III-V systems.

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Khaled Mnaymneh, Dan Dalacu, Simon Frédérick, Jean Lapointe, Philip J. Poole, Robin L. Williams. 2012-10-03. A Semiconductor Under Insulator Technology in Indium Phosphide. https://doi.org/10.1063/1.4760231

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