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arXiv · 1210.4249

Checking the error correction strength of arbitrary surface code logical gates

Thomas J. Milburn·Austin G. Fowler
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Abstract

Topologically quantum error corrected logical gates are complex. Chains of errors can form in space and time and diagonally in spacetime. It is highly nontrivial to determine whether a given logical gate is free of low weight combinations of errors leading to failure. We report a new tool Nestcheck capable of analyzing an arbitrary topological computation and determining the minimum number of errors required to cause failure.

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Thomas J. Milburn, Austin G. Fowler. 2012-10-16. Checking the error correction strength of arbitrary surface code logical gates. https://arxiv.org/abs/1210.4249

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