Searcharxiv⌕ Search
Home/Archive/arXiv

arXiv · 1301.2013

A real-time design based on FPGA for Expeditious Error Reconciliation in QKD system

Ke Cui·Jian Wang·Hong-fei Zhang·Chun-li Luo·Ge Jin·Teng-yun Chen
View original source ↗Read source document ↗Export metadata ↓

Abstract

For high-speed quantum key distribution systems, error reconciliation is often the bottleneck affecting system performance. By exchanging common information through a public channel, the identical key can be generated on both communicating sides. However, the necessity to eliminate disclosed bits for security reasons lowers the final key rate. To improve this key rate, the amount of disclosed bits should be minimized. In addition, decreasing the time spent on error reconciliation also improves the key rate. In this paper we introduce a practical method for expeditious error reconciliation implemented in a Field Programmable Gate Array for a discrete variable quantum key distribution system, and illustrate the superiority of this method to other similar algorithms running on a PC. Experimental results demonstrate the rapidity of the proposed protocol.

Explore related subjects

quant-phcs.CR

Keep this discovery

BibTeXRIS

Ke Cui, Jian Wang, Hong-fei Zhang, Chun-li Luo, Ge Jin, Teng-yun Chen. 2013-01-10. A real-time design based on FPGA for Expeditious Error Reconciliation in QKD system. https://doi.org/10.1109/tifs.2012.2228855

Cite the original work for its findings. Save a collection to share your selection of sources.

KEEP EXPLORING

Related papers

arXiv2026

Probing the Error-Mitigation Threshold with Matrix Product States

Quantum error mitigation relies on accurate noise characterization, but mismatches between the actual and characterized noise can be amplified and drive a sharp threshold between successful and failed mitigation. In random circuits, this threshold maps onto a random-field Ising transition, but previous exact numerics were limited to small one-dimensional and all-to-all systems, leaving explicit two-dimensional architectures unresolved. We develop a fixed-bond-dimension matrix-product-state method for the replicated transfer dynamics that extends threshold calculations beyond exact propagation while retaining the finite-size signatures of the transition. At system sizes beyond previous exact studies, we recover the predicted absence of a threshold for quenched disorder in 1D, obtain a sharper annealed all-to-all critical point, and resolve architecture-dependent finite-depth thresholds in 2D square and heavy-hex circuits. These results establish replicated tensor-network dynamics as a practical tool for probing error-mitigation thresholds in large and higher-dimensional noisy circuits.

quant-ph↗
arXiv2026

Low-cost algorithm-to-execution framework for surface-code quantum computing

The execution of useful quantum algorithms on fault-tolerant processors requires more than a mapping from logical gates to encoded operations: the spatial organization, non-Clifford resource supply, and execution schedule must also be determined while keeping physical overhead within practical limits. Although the theoretical hierarchy from logical circuits to fault-tolerant operations is well established, these implementation choices are often specified and optimized separately. Here we develop a low-cost algorithm-to-execution framework for surface-code quantum computing. From hierarchical algorithm descriptions, it constructs dependency-preserving logical schedules and an executable workload capturing logical interactions, operation parallelism, and time-resolved non-Clifford demand, thereby linking logical computation to surface-code organization, resource-state preparation, and fault-tolerant execution in a traceable workflow. We apply the framework to twenty benchmark circuits across seven algorithm families and a hierarchically composed application-scale elliptic-curve discrete-logarithm workload. Physical costs vary substantially even for circuits with similar logical resource counts. Under our direct-rotation calibration, non-Clifford implementation selection reduces space-time volume by up to 241.5 times versus an all-synthesis baseline for the QAOA amplitude-amplification workload. Circuit-specific surface-code layouts reduce routed-latency estimates for all twenty benchmarks; thirteen also reduce space-time volume because communication savings outweigh added spatial overhead. These results show that low-cost fault-tolerant execution depends on computation scheduling and organization, not aggregate logical resource counts alone.

quant-ph↗
arXiv2026

Sample-optimal learning of stabilizer states

It is well-known that learning a pure $n$-qubit stabilizer state $|\psi\rangle$ both requires, and can be accomplished with, access to a number of copies of $|\psi\rangle$ linear in $n$. However, the precise constant coefficient of this scaling does not appear to have been determined. Here we prove that $L_\delta(n)$, the smallest number of copies from which a quantum procedure can identify any stabilizer state with failure probability at most $0<\delta<1/8$, satisfies $n+\lceil\log_2(1/\delta)\rceil-3\leq L_\delta(n)\leq n+\left\lceil\log_2(1/\delta)\right\rceil+4$. We present a polynomial-time quantum learning algorithm that saturates this bound, achieving a constant factor improvement in sample-complexity over previously known approaches. As an immediate corollary, we obtain via the Choi-Jamiolkowski isomorphism an algorithm for learning an unknown $n$-qubit Clifford unitary from $2n+\left\lceil\log_2(1/\delta)\right\rceil+4$ queries, the $n$-dependence of which we show to be optimal. Our proof technique, which involves Fourier analysis on the abelian group $\mathbb{Z}_4^n \times \mathbb{F}_2^{n(n-1)/2}$, seems to be qualitatively different to previous approaches to stabilizer state learning, and may be of some independent interest; in particular, it admits natural generalisations to further problems in quantum learning theory.

quant-ph↗