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arXiv · 1612.04986

HADES: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems

Lukáš Charvát·Aleš Smrčka·Tomáš Vojnar
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Abstract

HADES is a fully automated verification tool for pipeline-based microprocessors that aims at flaws caused by improperly handled data hazards. It focuses on single-pipeline microprocessors designed at the register transfer level (RTL) and deals with read-after-write, write-after-write, and write-after-read hazards. HADES combines several techniques, including data-flow analysis, error pattern matching, SMT solving, and abstract regular model checking. It has been successfully tested on several microprocessors for embedded applications.

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Lukáš Charvát, Aleš Smrčka, Tomáš Vojnar. 2016-12-15. HADES: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. https://doi.org/10.4204/eptcs.233.9

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