Linearity Analysis of the Common Collector Amplifier, or Emitter Follower

Abstract

A recently introduced Early modeling of transistors is applied to the study of the common collector amplifier (or emitter follower), an important type of electronic circuit typically employed as buffer, being characterized by near unit voltage gain, high input resistance, and low output resistance. The Early equivalent model is applied to derive a simple representation that is simple and yet capable of incorporating the transistor non-linearities implied by the Early effect. Mathematical expressions are obtained describing completely the circuit operation in terms of currents and voltages, allowing accurate estimation of the average voltage gain, total harmonic distortion (THD), and average input and output resistances. Prototypes of small signal silicon transistors of types NPN and PNP obtained in a previous work are used to discuss the respectively implied properties of the common collector transistor. In addition to confirming the importance of the trade-off of current gain for the desired properties, it is also shown that sub-optimal performance can be obtained in case the base and emitter resistances are not properly chosen. Even so, the limited current gain implied by real-world NPN and PNP small signal silicon devices implies some performance constraints. In particular, it has been observed that the THD tends to be larger for PNP devices than NPN counterparts with the same average current gain. The obtained results pave the way not only to complementary analytical studies, but also provide guidance for design and implementation of improved common collector configurations.