A Note on Polynomial Identity Testing for Depth-3 Circuits

V. Arvind; Abhranil Chatterjee; Rajit Datta; Partha Mukhopadhyay

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arXiv · 1805.06692

A Note on Polynomial Identity Testing for Depth-3 Circuits

V. Arvind·Abhranil Chatterjee·Rajit Datta·Partha Mukhopadhyay

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Abstract

Let $C$ be a depth-3 arithmetic circuit of size at most $s$, computing a polynomial $ f \in \mathbb{F}[x_1,\ldots, x_n] $ (where $\mathbb{F}$ = $\mathbb{Q}$ or $\mathbb{C}$) and the fan-in of the product gates of $C$ is bounded by $d$. We give a deterministic polynomial identity testing algorithm to check whether $f\equiv 0$ or not in time $ 2^d \text{ poly}(n,s) $.

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V. Arvind, Abhranil Chatterjee, Rajit Datta, Partha Mukhopadhyay. 2018-05-17. A Note on Polynomial Identity Testing for Depth-3 Circuits. https://arxiv.org/abs/1805.06692

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