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arXiv · 2008.01040

A Learned Performance Model for Tensor Processing Units

Samuel J. Kaufman·Phitchaya Mangpo Phothilimthana·Yanqi Zhou·Charith Mendis·Sudip Roy·Amit Sabne·Mike Burrows
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Abstract

Accurate hardware performance models are critical to efficient code generation. They can be used by compilers to make heuristic decisions, by superoptimizers as a minimization objective, or by autotuners to find an optimal configuration for a specific program. However, they are difficult to develop because contemporary processors are complex, and the recent proliferation of deep learning accelerators has increased the development burden. We demonstrate a method of learning performance models from a corpus of tensor computation graph programs for Tensor Processing Unit (TPU) instances. We show that our learned model outperforms a heavily-optimized analytical performance model on two tasks -- tile-size selection and operator fusion -- and that it helps an autotuner discover faster programs in a setting where access to TPUs is limited or expensive.

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Samuel J. Kaufman, Phitchaya Mangpo Phothilimthana, Yanqi Zhou, Charith Mendis, Sudip Roy, Amit Sabne, Mike Burrows. 2020-08-03. A Learned Performance Model for Tensor Processing Units. https://arxiv.org/abs/2008.01040

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