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arXiv · 2008.03124

Design Space Exploration of Power Delivery For Advanced Packaging Technologies

Md Obaidul Hossen·Yang Zhang·Hesam Fathi Moghadam·Yue Zhang·Michael Dayringer·Muhannad S Bakir
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Abstract

In this paper, a design space exploration of power delivery networks is performed for multi-chip 2.5-D and 3-D IC technologies. The focus of the paper is the effective placement of the voltage regulator modules (VRMs) for power supply noise (PSN) suppression. Multiple on-package VRM configurations have been analyzed and compared. Additionally, 3D IC chip-on-VRM and backside-of-the-package VRM configurations are studied. From the PSN perspective, the 3D IC chip-on-VRM case suppresses the PSN the most even with high current density hotspots. The paper also studies the impact of different parameters such as VRM-chip distance on the package, on-chip decoupling capacitor density, etc. on the PSN.

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Md Obaidul Hossen, Yang Zhang, Hesam Fathi Moghadam, Yue Zhang, Michael Dayringer, Muhannad S Bakir. 2020-07-10. Design Space Exploration of Power Delivery For Advanced Packaging Technologies. https://arxiv.org/abs/2008.03124

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