Assessment of wafer-level transfer techniques of graphene with respect to semiconductor industry requirements

Abstract

Graphene is a promising candidate for future electronic applications. Manufacturing graphene-based electronic devices typically requires graphene transfer from its growth substrate to another desired substrate. This key step for device integration must be applicable at the wafer level and meet the stringent requirements of semiconductor fabrication lines. In this work, wet and semidry transfer (i.e. wafer bonding) are evaluated regarding wafer scalability, handling, potential for automation, yield, contamination and electrical performance. A wafer scale tool was developed to transfer graphene from 150 mm copper foils to 200 mm silicon wafers with-out adhesive intermediate polymers. The transferred graphene coverage ranged from 97.9% to 99.2% for wet transfer and from 17.2% to 90.8% for semidry transfer, with average cop-per contaminations of 4.7x10$^{13}$ (wet) and 8.2x10$^{12}$ atoms/cm$^2$ (semidry). The corresponding electrical sheet resistance extracted from terahertz time-domain spectroscopy varied from 450 to 550 ${\Omega}/sq$ for wet transfer and from 1000 to 1650 ${\Omega}/sq$ for semidry transfer. Although wet transfer is superior in terms of yield, carbon contamination level and electrical quality, wafer bonding yields lower copper contamination levels and provides scalability due to existing in-dustrial tools and processes. Our conclusions can be generalized to all two-dimensional (2D) materials.