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arXiv · 2308.00846

Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology

Bongjoon Hyun·Taehun Kim·Dongjae Lee·Minsoo Rhu
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Abstract

Processing-in-memory (PIM) has been explored for decades by computer architects, yet it has never seen the light of day in real-world products due to their high design overheads and lack of a killer application. With the advent of critical memory-intensive workloads, several commercial PIM technologies have been introduced to the market ranging from domain-specific PIM architectures to more general-purpose PIM architectures. In this work, we deepdive into UPMEM's commercial PIM technology, a general-purpose PIM-enabled parallel architecture that is highly programmable. Our first key contribution is the development of a flexible simulation framework for PIM. The simulator we developed (aka PIMulator) enables the compilation of UPMEM-PIM source codes into its compiled machine-level instructions, which are subsequently consumed by our cycle-level performance simulator. Using PIMulator, we demystify UPMEM's PIM design through a detailed characterization study. Building on top of our characterization, we conduct a series of case studies to pathfind important architectural features that we deem will be critical for future PIM architectures to support

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Bongjoon Hyun, Taehun Kim, Dongjae Lee, Minsoo Rhu. 2023-08-01. Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology. https://arxiv.org/abs/2308.00846

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