arXiv · 2310.11735
Performance of FPGA controller in ISAC-1 accelerator chain
Abstract
The LLRF of five of TRIUMF's ISAC-1 accelerator cavities have been replaced by 3 similar FPGA based system with different operating frequencies. These LLRF use internal digital phase locked loops for frequency generation and synchronization, feedback control using Amplitude/Phase regulations. These FPGAs also have internal stepper motor controller for resonance control. Various modes of resonance control are possible, including phase comparison and minimum seeking slide-mode control. Operational performances including frequency generation and synchronization, amplitude and phase noises, tuning speeds, compatibility to original remote controls, are reported.
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K. Fong, X. Fu, Q. W. Zheng, T. Au, R. Leewe, TRIUMF, V6T2A3, Vancouver, Canada. 2023-10-18. Performance of FPGA controller in ISAC-1 accelerator chain. https://arxiv.org/abs/2310.11735
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