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arXiv · 2405.00308

FPGA Digital Dice using Pseudo Random Number Generator

Michael Lim Kee Hian·Ten Wei Lin·Zachary Wu Xuan·Stephanie-Ann Loy·Maoyang Xiang·T. Hui Teo
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Abstract

The goal of this project is to design a digital dice that displays dice numbers in real-time. The number is generated by a pseudo-random number generator (PRNG) using XORshift algorithm that is implemented in Verilog HDL on an FPGA. The digital dice is equipped with tilt sensor, display, power management circuit, and rechargeable battery hosted in a 3D printed dice casing. By shaking the digital dice, the tilt sensor signal produces a seed for the PRNG. This digital dice demonstrates a set of possible random numbers of 2, 4, 6, 8, 10, 12, 20, 100 that simulate the number of dice sides. The kit is named SUTDicey.

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Michael Lim Kee Hian, Ten Wei Lin, Zachary Wu Xuan, Stephanie-Ann Loy, Maoyang Xiang, T. Hui Teo. 2024-05-01. FPGA Digital Dice using Pseudo Random Number Generator. https://arxiv.org/abs/2405.00308

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