Ion-Based Quantum Computing Hardware: Performance and End-User Perspective

Abstract

This is the second paper in a series of papers providing an overview of different quantum computing hardware platforms from an industrial end-user perspective. It follows our first paper on neutral-atom quantum computing. In the present paper, we provide a survey on the current state-of-the-art in trapped-ion quantum computing, taking up again the perspective of an industrial end-user. To this end, our paper covers, on the one hand, a comprehensive introduction to the physical foundations and mechanisms that play an important role in operating a trapped-ion quantum computer. On the other hand, we provide an overview of the key performance metrics that best describe and characterise such a device's current computing capability. These metrics encompass performance indicators such as qubit numbers, gate times and errors, native gate sets, qubit stability and scalability as well as considerations regarding the general qubit types and trap architectures. In order to ensure that these metrics reflect the current state of trapped-ion quantum computing as accurate as possible, they have been obtained by both an extensive review of recent literature and, more importantly, from discussions with various quantum hardware vendors in the field. We combine these factors and provide - again from an industrial end-user perspective - an overview of what is currently possible with trapped-ion quantum computers, which algorithms and problems are especially suitable for this platform, what are the relevant end-to-end wall clock times for calculations, and what might be possible with future fault-tolerant trapped-ion quantum computers.