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arXiv · 2406.09078

ONNX-to-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs

Federico Manca·Francesco Ratto·Francesca Palumbo
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Abstract

The challenges involved in executing neural networks (NNs) at the edge include providing diversity, flexibility, and sustainability. That implies, for instance, supporting evolving applications and algorithms energy-efficiently. Using hardware or software accelerators can deliver fast and efficient computation of the NNs, while flexibility can be exploited to support long-term adaptivity. Nonetheless, handcrafting an NN for a specific device, despite the possibility of leading to an optimal solution, takes time and experience, and that's why frameworks for hardware accelerators are being developed. This work, starting from a preliminary semi-integrated ONNX-to-hardware toolchain [21], focuses on enabling approximate computing leveraging the distinctive ability of the original toolchain to favor adaptivity. The goal is to allow lightweight adaptable NN inference on FPGAs at the edge.

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Federico Manca, Francesco Ratto, Francesca Palumbo. 2024-06-13. ONNX-to-Hardware Design Flow for Adaptive Neural-Network Inference on FPGAs. https://arxiv.org/abs/2406.09078

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