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arXiv · 2412.05323

SPICE-PIDE: A Methodology for Design and Optimization of Integrated Circuits

Jehan Taraporewalla·Arun KP·Sugata Ghosh·Abhishek Agarwal·Bijaydoot Basak·Dipankar Saha
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Abstract

In application-specific designs, owing to the trade-off between power consumption and speed, optimization of various circuit parameters has become a challenging task. Several of the performance metrics, viz. energy efficiency, gain, performance, and noise immunity, are interrelated and difficult to tune. Such efforts may result in a great deal of manual iterations which in turn increase the computational overhead. Thus, it is important to develop a methodology that not only explores large design space but also reduces the computational time. In this work, we investigate the viability of using a SPICE and Python IDE (PIDE) interface to optimize integrated circuits. The SPICE simulations are carried out using 22 nm technology node with a nominal supply voltage of 0.8 V. The SPICE-PIDE optimizer, as delineated in this work, is able to provide the best solution sets considering various performance metrics and design complexities for 5 transistor level converters.

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Jehan Taraporewalla, Arun KP, Sugata Ghosh, Abhishek Agarwal, Bijaydoot Basak, Dipankar Saha. 2024-12-04. SPICE-PIDE: A Methodology for Design and Optimization of Integrated Circuits. https://arxiv.org/abs/2412.05323

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