A protocol to reduce worst-case latency in deflection-based on-chip networks

Leandro Soares Indrusiak

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arXiv · 2510.11361

A protocol to reduce worst-case latency in deflection-based on-chip networks

Leandro Soares Indrusiak

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Abstract

We present a novel protocol that reduces worst-case packet latency in deflection-based on-chip interconnect networks. It enforces the deflection of the header of a packet but not its payload, resulting in a reduction in overall network traffic and, more importantly, worst-case packet latency due to decreased pre-injection latency.

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Leandro Soares Indrusiak. 2025-10-13. A protocol to reduce worst-case latency in deflection-based on-chip networks. https://arxiv.org/abs/2510.11361

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