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arXiv · 2510.24112

SLOTH: Lightweight Detection and Localization of On-Chip Fail-Slow Failures for DNN Accelerators

Junchi Wu·Xinfei Wan·Zhuoran Li·Yuyang Jin·Guangyu Sun·Yun Liang·Diyu Zhou·Youwei Zhuo
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Abstract

Spatial DNN accelerators are essential for high-performance inference, but their performance is undermined by widespread fail-slow failures. Detecting such failures on-chip is challenging, as prior methods from distributed systems are unsuitable due to strict memory limits and their inability to track failures across the hardware topology. We present SLOTH, a lightweight, hardware-aware framework for practical on-chip fail-slow detection in DNN accelerators. SLOTH combines workload-aware instrumentation for operator-level monitoring with minimal overhead, on-the-fly trace compression to operate within kilobytes of memory, and a novel topology-aware ranking algorithm to pinpoint a failure's root cause. We evaluate SLOTH on a wide range of representative DNN workloads. The results demonstrate that SLOTH reduces the storage overhead by an average of 115.9$\times$, while achieving an average fail-slow detection accuracy from 69.68\% to 86.69\%.

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Junchi Wu, Xinfei Wan, Zhuoran Li, Yuyang Jin, Guangyu Sun, Yun Liang, Diyu Zhou, Youwei Zhuo. 2025-10-28. SLOTH: Lightweight Detection and Localization of On-Chip Fail-Slow Failures for DNN Accelerators. https://arxiv.org/abs/2510.24112

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