Deep Photonic Reservoir Computing with On-chip Nonlinearity

Abstract

Reservoir computing, renowned for its low training cost, has emerged as a promising lightweight paradigm for efficient spatiotemporal processing,it remains challenging to realize deep photonic reservoir computing (DPRC) systems, due to the lack of scalable on-chip nonlinearity. Here, we introduce a versatile time delayed DPRC framework that natively supports deep and concurrent spatiotemporal processing entirely in the optical domain. At its core, the system leverages free carrier dynamics in silicon microring resonators to provide the fundamental nonlinearity and short term memory, and these nonlinear nodes are interconnected through true time delay lines that establish shared long-term memory. Benefiting from intrinsic physical nonlinearity and multi-timescale fading memory, this simple yet effective architecture demonstrates remarkable high dimensional representation capabilities. On the NTU RGB D benchmark, the parameter efficient DPRC system achieves superior action recognition accuracies compared to mainstream deep learning models, while requiring only a single shot regression training procedure. We further verify a prototype DPRC chip that excels across diverse dataset classification and time series prediction tasks. It enables a streamlined all optical pipeline between hierarchical layers, delivering a consistent computational density of 334.25 TOPs/mm2, independent of the reservoir depth and three orders of magnitude higher than conventional approaches. Moreover, its performance scales with near-zero hardware overhead by utilizing additional wavelength channels. This DPRC network is highly scalable on a silicon photonic platform, with flexible extension to hundreds of deep reservoir layers and parallel channels, paving the way toward intelligent optoelectronic systems for advanced real time processing and parallel decision making.