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arXiv · 2601.22114

SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence

Saoud Aldowaish·Yashwanth Karumanchi·Kai-Chen Chiang·Soroosh Noorzad·Morteza Fayazi
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Abstract

Current methods for converting circuit schematic images into machine-readable netlists struggle with component recognition and connectivity inference. In this paper, we present SINA, an open-source, fully automated circuit schematic image-to-netlist generator. SINA integrates deep learning for accurate component detection, Connected-Component Labeling (CCL) for precise connectivity extraction, and Optical Character Recognition (OCR) for component reference designator retrieval, while employing a Vision-Language Model (VLM) for reliable reference designator assignments. In our experiments, SINA achieves 96.47% overall netlist-generation accuracy, which is 2.72x higher than state-of-the-art approaches.

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Saoud Aldowaish, Yashwanth Karumanchi, Kai-Chen Chiang, Soroosh Noorzad, Morteza Fayazi. 2026-01-29. SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence. https://arxiv.org/abs/2601.22114

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