Dispersion-Engineered Terahertz Silicon Interconnects Enabling Terabit-Scale Data Links

Abstract

The rapid growth of artificial intelligence (AI) and data-centric computing is driving exabyte-scale data transfer, pushing conventional interconnect technologies toward fundamental bandwidth and energy limits. Although optical interconnects provide high-capacity and long-reach communication, their complexity and energy overhead limit scalability in short-reach chiplet-based and on-chip systems. Terahertz (THz) silicon interconnects offer a promising alternative by bridging electronics and photonics in compact, complementary metal-oxide-semiconductor (CMOS)-compatible platforms capable of high bandwidth and low latency. However, practical THz interconnects require simultaneous multi-band operation, dual-polarization support, low propagation loss, low group-velocity dispersion (GVD), and terabit-per-second throughput, while avoiding Bragg-induced stopbands and dispersion penalties at high frequencies. Here, we demonstrate a CMOS-compatible, centimetre-scale, multi-band on-chip THz data link achieving an aggregate throughput of 1.004 Tbps. The performance is enabled by suppressing Bragg-induced stopbands using dispersion-engineered, effective-medium-supported unclad silicon waveguides, resulting in flat transmission and low-ripple group delay across multiple THz bands. The waveguide platform operates from 220 to 500 GHz and supports both transverse-electric (TE) and transverse-magnetic (TM) polarizations with low path loss, low bending loss, and low GVD. Fourteen channels in a straight waveguide and twelve channels in a 90$^\circ$ bend achieve aggregate data rates of 1.004 Tbps and 0.895 Tbps, respectively, with GVD as low as 0.15 ps$^2$/mm over the full operating band. These results establish a scalable and energy-efficient THz interconnect platform for high-density on-chip and chip-to-chip communication fabrics targeting next-generation AI systems and emerging 6G technologies.