BigPower: Hierarchical Source-Level Module Power Estimation for CPUs with Large Language Models

Honghua Zhu; Chunjie Luo; Jianfeng Zhan

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arXiv · 2606.13747

BigPower: Hierarchical Source-Level Module Power Estimation for CPUs with Large Language Models

Honghua Zhu·Chunjie Luo·Jianfeng Zhan

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Abstract

Accurate power estimation is important for understanding and optimizing CPU power behavior, yet practical workflows often rely on simulation-derived information or post-silicon analysis. In this work, we present BigPower, a hierarchical source-level surrogate model for fine-grained module-level power estimation during CPU design. BigPower leverages large language model-based representations together with architectural hierarchy, module connectivity, configuration parameters, and workload context to estimate module-level power consumption directly from source-level design information, without requiring additional simulation during inference. Experimental results in the open-source XiangShan processor family demonstrate practical fine-grained power estimation across diverse configurations and workloads, offering an efficient alternative to conventional simulation-based workflows.

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Honghua Zhu, Chunjie Luo, Jianfeng Zhan. 2026-06-11. BigPower: Hierarchical Source-Level Module Power Estimation for CPUs with Large Language Models. https://arxiv.org/abs/2606.13747

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