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arXiv · 2607.27473

Closed Timelike Curve Decoding on Quantum Hardware

Sai Nandan Morapakula·Kazuki Ikeda
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Abstract

Deutsch closed timelike curves (D-CTCs) are described by a fixed-point condition for a chronology-violating register. We study a finite-dimensional circuit model that places a Hayden--Preskill/Yoshida--Kitaev recovery map inside such a consistency loop. A register-routing construction makes the Deutsch map explicit: an initial SWAP moves the incoming CTC state to an idle dump register, the scrambler and decoder act on the remaining active registers, and a final SWAP writes the recovered message back to the CTC register. When the active branch recovers the message, the induced map on the CTC register is the replacement channel \(\sigma\mapsto \rho_M\), with the unique fixed point \(\rho_M\). We implement the associated Lloyd-type post-selected decoder circuits on quantum hardware and formulate a classical-feedback iteration for the experimentally estimated map. Qiskit simulations and IBM-hardware data for single-qubit instances quantify decoder fidelity, post-selection overhead, routing-dependent noise, and quantum-geometric susceptibility.

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Sai Nandan Morapakula, Kazuki Ikeda. 2026-07-29. Closed Timelike Curve Decoding on Quantum Hardware. https://arxiv.org/abs/2607.27473

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