Design-Space Exploration of Post-Quantum Cryptography Acceleration on an Open-Source RISC-V GPGPU

Hossam Hassan; Marc Xander Makkes; Chae Eun Lee; Hyungmin Yoon

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arXiv · 2609.22343

Design-Space Exploration of Post-Quantum Cryptography Acceleration on an Open-Source RISC-V GPGPU

Hossam Hassan·Marc Xander Makkes·Chae Eun Lee·Hyungmin Yoon

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Abstract

Post-quantum cryptography (PQC) acceleration has been studied for CPUs and FPGAs, yet GPGPUs - dominating high-throughput computing - remain unexplored for PQC hardware integration as a functional unit. We present what is, to our knowledge, the first such integration: the Vortex Post-Quantum Crypto Unit (PCU) on the open-source Vortex RISC-V GPGPU. The PCU implements a 256-point NTT over Kyber (q=3329) and Dilithium (q=8380417) moduli in 134 logic cells (73 LUT4 + 61 CCU2C) - the smallest reported NTT accelerator by logic-cell count, 2.8x smaller than the next smallest design. It achieves 228.78 MHz on Lattice ECP5 and 299.8 MHz place-and-route on Xilinx Artix-7, and passes 253 functional tests across 7 suites. On Vortex SimX, it achieves 42.6x acceleration over GPU ALU execution, projecting to roughly 36x speedup on RTL. Synthesized to ASAP7 7nm, the NTT datapath occupies 96.53 um^2 (post-route) at 702 MHz. This work establishes a foundation for integrating PQC hardware acceleration into general-purpose parallel computing.

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Hossam Hassan, Marc Xander Makkes, Chae Eun Lee, Hyungmin Yoon. 2026-09-16. Design-Space Exploration of Post-Quantum Cryptography Acceleration on an Open-Source RISC-V GPGPU. https://arxiv.org/abs/2609.22343

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