From Prompts to Silicon: Scaling LLM-Assisted Chip Design with the AI Hardware Design League

Parsa Mirfasihi; Harish Kumar Dharavath; Muhtasim Alam Chowdhury; Sujan Ghimire; Banafsheh Saber Latibari; Rozhin Yasaei; Pratik Satam; Soheil Salehi

arXiv · 2610.18891

From Prompts to Silicon: Scaling LLM-Assisted Chip Design with the AI Hardware Design League

Parsa Mirfasihi·Harish Kumar Dharavath·Muhtasim Alam Chowdhury·Sujan Ghimire·Banafsheh Saber Latibari·Rozhin Yasaei·Pratik Satam·Soheil Salehi

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Abstract

The semiconductor workforce shortage has renewed interest in making chip design accessible to students without conventional very-large-scale integration (VLSI) training. We present the AI Hardware Design League (AI-HDL), an international, project-based competition in which students use Large Language Models (LLMs) to generate and iteratively refine Verilog while simulation, synthesis, timing analysis, security review, and physical verification provide the engineering feedback needed to validate the result. Across two annual cycles, AI-HDL grew from 172 to 604 participants and from 40 to 108 teams, reaching 30 universities, six community colleges, and 19 countries. In the 2026 cohort, 68.7% of participants reported no prior Verilog experience. Twenty-two teams completed the four design phases and reached final evaluation. Two division-winning designs completed physical sign-off in the SkyWater 130 nm (Sky130) process, passing design-rule checking and layout-versus-schematic verification with zero violations before being submitted for fabrication. These results show that an LLM-assisted, tool-grounded workflow can be deployed at substantial scale while also revealing that completion, rather than initial access, remains the principal challenge. AI-HDL materials and finalist artifacts are released to support replication and future study.

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Parsa Mirfasihi, Harish Kumar Dharavath, Muhtasim Alam Chowdhury, Sujan Ghimire, Banafsheh Saber Latibari, Rozhin Yasaei, Pratik Satam, Soheil Salehi. 2026-10-09. From Prompts to Silicon: Scaling LLM-Assisted Chip Design with the AI Hardware Design League. https://arxiv.org/abs/2610.18891

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