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A. Gorišek

Publications and source records attributed to A. Gorišek.

7 recordsLinked to original sources

Gain Recovery in Heavily Irradiated Low Gain Avalanche Detectors by High Temperature Annealing

Studies of annealing at temperatures up to 450$^\circ$C with LGADs irradiated with neutrons are described. It was found that the performance of LGADs irradiated with 1.5e15 n/cm$^2$ was already improved at 5 minutes of annealing at 250$^\circ$C. Isochronal annealing for 30 minutes in 50$^\circ$C steps between 300$^\circ$C and 450$^\circ$C showed that the largest beneficial effect of annealing is at around 350$^\circ$C. Another set of devices was annealed for 60 minutes at 350$^\circ$C and this annealing significantly increased V$_{\mathrm{gl}}$. The effect is equivalent to reducing the effective acceptor removal constant by a factor of $\sim$ 4. Increase of V$_{\mathrm{gl}}$ is the consequence of increased effective space charge in the gain layer caused by formation of electrically active defects or re-activation of interstitial Boron atoms.

physics.ins-det↗

Study of neutron irradiation effects in Depleted CMOS detector structures

In this paper results of Edge-TCT and I-V measurements with passive test structures made in LFoundry 150 nm HV-CMOS process on p-type substrates with different initial resistivities ranging from 0.5 to 3 k$Ω$cm are presented. Samples were irradiated with reactor neutrons up to a fluence of 2$\cdot$10$^{15}$ n$_{\mathrm{eq}}$/cm$^2$. Depletion depth was measured with Edge-TCT. Effective space charge concentration $N_{\mathrm{eff}}$ was estimated from the dependence of depletion depth on bias voltage and studied as a function of neutron fluence. Dependence of $N_{\mathrm{eff}}$ on fluence changes with initial acceptor concentration in agreement with other measurements with p-type silicon. Long term accelerated annealing study of $N_{\mathrm{eff}}$ and detector current up to 1280 minutes at 60$^\circ$C was made. It was found that $N_{\mathrm{eff}}$ and current in reverse biased detector behaves as expected for irradiated silicon.

physics.ins-det↗

Characterisation of analogue front end and time walk in CMOS active pixel sensor

In this work we investigated a method to determine time walk in an active silicon pixel sensor prototype using Edge-TCT with infrared laser charge injection. Samples were investigated before and after neutron irradiation to 5e14 neq/cm2. Threshold, noise and calibration of the analogue front end were determined with external charge injection. A spatially sensitive measurement of collected charge and time walk was carried out with Edge-TCT, showing a uniform charge collection and output delay in pixel centre. On pixel edges charge sharing was observed due to finite beam width resulting in smaller signals and larger output delay. Time walk below 25 ns was observed for charge above 2000 electrons at a threshold above the noise level. Time walk measurement with external charge injection yielded identical results.

physics.ins-det↗

Measurements with silicon detectors at extreme neutron fluences

Thin pad detectors made from 75 $μ$m thick epitaxial silicon on low resistivity substrate were irradiated with reactor neutrons to fluences from 2.5$\times 10^{16}$ n/cm$^2$ to 1$\times 10^{17}$ n/cm$^2$. Edge-TCT measurements showed that the active detector thickness is limited to the epitaxial layer and does not extend into the low resistivity substrate even after the highest fluence. Detector current was measured under reverse and forward bias. The forward current was higher than the reverse at the same voltage but the difference gets smaller with increasing fluence. Rapid increase of current (breakdown) above ~ 700 V under reverse bias was observed. An annealing study at 60$^\circ$C was made to 1200 minutes of accumulated annealing time. It showed that the reverse current anneals with similar time constants as measured at lower fluences. A small increase of forward current due to annealing was seen. Collected charge was measured with electrons from $^{90}$Sr source in forward and reverse bias configurations. Under reverse bias the collected charge increased linearly with bias voltage up to 6000 electrons at 2.5$\times 10^{16}$ n/cm$^2$ and 3000 electrons at 1$\times 10^{17}$ n/cm$^2$. Rapid increase of noise was measured above $\sim$ 700 V reverse bias due to breakdown resulting in worse S/N ratio. At low bias voltages slightly more charge is measured under forward bias compared to reverse. However better S/N is achieved under reverse bias. Effective trapping times were estimated from charge collection measurements under forward bias showing that at high fluences they are much longer than values extrapolated from low fluence measurements - at 1$\times 10^{17}$ n/cm$^2$ a factor of 6 larger value was measured.

physics.ins-det↗

Recent Results from Polycrystalline CVD Diamond Detectors

Diamond is a material in use at many nuclear and high energy facilities due to its inherent radiation tolerance and ease of use. We have characterized detectors based on chemical vapor deposition (CVD) diamond before and after proton irradiation. We present preliminary results of the spatial resolution of unirradiated and irradiated CVD diamond strip sensors. In addition, we measured the pulse height versus particle rate of unirradiated and irradiated polycrystalline CVD (pCVD) diamond pad detectors up to a particle flux of $20\,\mathrm{MHz/cm^2}$ and a fluence up to $4 \times 10^{15}\,n/\mathrm{cm^2}$.

physics.ins-det↗

Charge collection properties of irradiated depleted CMOS pixel test structures

Edge-TCT and charge collection measurements with passive test structures made in LFoundry 150 nm CMOS process on p-type substrate with initial resistivity of over 3 k$Ω$cm are presented. Measurements were made before and after irradiation with reactor neutrons up to 2$\cdot$10$^{15}$ n$_{\mathrm{eq}}$/cm$^2$. Two sets of devices were investigated: unthinned (700 $μ$m) with substrate biased through the implant on top and thinned (200 $μ$m) with processed and metallised back plane. Depleted depth was estimated with Edge-TCT and collected charge was measured with $^{90}$Sr source using an external amplifier with 25 ns shaping time. Depleted depth at given bias voltage decreased with increasing neutron fluence but it was still larger than 70 $μ$m at 250 V after the highest fluence. After irradiation much higher collected charge was measured with thinned detectors with processed back plane although the same depleted depth was observed with Edge-TCT. Most probable value of collected charge of over 5000 electrons was measured also after irradiation to 2$\cdot$10$^{15}$ n$_{\mathrm{eq}}$/cm$^2$. This is sufficient to ensure successful operation of these detectors at the outer layer of the pixel detector in the ATLAS experiment at the upgraded HL-LHC.

physics.ins-det↗

Charge collection properties in an irradiated pixel sensor built in a thick-film HV-SOI process

Investigation of HV-CMOS sensors for use as a tracking detector in the ATLAS experiment at the upgraded LHC (HL-LHC) has recently been an active field of research. A potential candidate for a pixel detector built in Silicon-On-Insulator (SOI) technology has already been characterized in terms of radiation hardness to TID (Total Ionizing Dose) and charge collection after a moderate neutron irradiation. In this article we present results of an extensive irradiation hardness study with neutrons up to a fluence of 1x10e16 neq/cm2. Charge collection in a passive pixelated structure was measured by Edge Transient Current Technique (E-TCT). The evolution of the effective space charge concentration was found to be compliant with the acceptor removal model, with the minimum of the space charge concentration being reached after 5x10e14 neq/cm2. An investigation of the in-pixel uniformity of the detector response revealed parasitic charge collection by the epitaxial silicon layer characteristic for the SOI design. The results were backed by a numerical simulation of charge collection in an equivalent detector layout.

physics.ins-det↗