arXiv subjects

A. Khanna

Publications and source records attributed to A. Khanna.

2 recordsLinked to original sources

arXiv2017

Reaction-Drift Model for Switching Transients in Pr$_{0.7}$Ca$_{0.3}$MnO$_3$ Based Resistive RAM

Earlier, the DC hole-current modeling of PCMO RRAM by drift-diffusion (DD) including self-heating (SH) in TCAD (but without ionic transport) was able to explain the experimentally observed SCLC characteristics, prior to resistive switching. Further, transient analysis using DD+SH model was able to reproduce the experimentally observed fast current increase at ~100ns timescale followed by saturation increases, prior to resistive switching. However, resistive switching requires the inclusion of ionic transport. We propose a Reaction-Drift (RD) model of oxide ions, which is combined with the DD+SH model. Experimentally, SET operations consist of 3 stages and RESET operations consists of 4 stages. The DD+SH+RD model is able to reproduce the entire transient behavior over 10$^{-8}$-1s range in timescale for both SET and RESET operations for a range of bias, temperature. Remarkably, a universal RESET behaviour of $log(I)\propto m*log(t)$, where $m\approx -1/10$, is reproduced. The quantitatively different voltage time dilemma for SET and RESET is also replicated for a range of ambient temperature. This demonstrates a comprehensive model for resistance switching in PCMO based RRAM.

cond-mat.mtrl-sci↗

arXiv2016

Space Charge Limited Current with Self-heating in Pr$_{0.7}$Ca$_{0.3}$MnO$_3$ based RRAM

Space Charge Limited Current (SCLC) based conduction has been identified for PCMO-based RRAM devices based on the observation that $I \propto V^α$ where $α\approx 2$. A critical feature of the IV characteristics is a sharp rise in current ($α\gg 2$) which has been widely attributed to trap-filled limit (TFL) followed by an apparent trap-free SCLC conduction. In this paper, we show by TCAD analysis that trap-filled limit (TFL) is insufficient to explain the sharp current rise ($α\gg 2$). As an alternative, we propose a shallow trap SCLC model with selfheating effect based thermal runaway to explain the sharp current rise followed by a series resistance dominated regime. Experimental results over a range of 25°C-125°C demonstrate all 4 regimes (i) Ohmic ($α= 1$), (ii) shallow trap SCLC ($α\approx 2$), (iii) current shoot up ($α\gg 2$) and (iv) series resistance ($α= 1$). Further, TCAD simulations with thermal modeling are able to match the experimental IV characteristics in all the regimes. Thus, a current conduction mechanism in PCMO-based RRAM supported by detailed TCAD model is presented. Such a model is essential for further quantitative understanding and design for PCMO-based RRAM.

cond-mat.mtrl-sci↗