arXiv subjects

Aashu Jha

Publications and source records attributed to Aashu Jha.

7 recordsLinked to original sources

arXiv2022

Broadband physical layer cognitive radio with an integrated photonic processor for blind source separation

The expansion of telecommunications incurs increasingly severe crosstalk and interference, and a physical layer cognitive method, called blind source separation (BSS), can effectively address these issues. BSS requires minimal prior knowledge to recover signals from their mixtures, agnostic to carrier frequency, signal format, and channel conditions. However, previous electronic implementations of BSS did not fulfill this versatility requirement due to the inherently narrow bandwidth of radio-frequency (RF) components, the high energy consumption of digital signal processors (DSP), and their shared weaknesses of low scalability. Here, we report a photonic BSS approach that inherits the advantages of optical devices and can fully fulfill its "blindness" aspect. Using a microring weight bank integrated on a photonic chip, we demonstrate energy-efficient, WDM-scalable BSS across 19.2 GHz of bandwidth, covering many standard frequency bands. Our system also has a high (9-bit) resolution for signal demixing thanks to a recently developed dithering control method, resulting in higher signal-to-interference ratios (SIR) even for ill-conditioned mixtures.

eess.SP↗

arXiv2022

Silicon microring synapses enable photonic deep learning beyond 9-bit precision

Deep neural networks (DNN) consist of layers of neurons interconnected by synaptic weights. A high bit-precision in weights is generally required to guarantee high accuracy in many applications. Minimizing error accumulation between layers is also essential when building large-scale networks. Recent demonstrations of photonic neural networks are limited in bit-precision due to crosstalk and the high sensitivity of optical components (e.g., resonators). Here, we experimentally demonstrate a record-high precision of 9 bits with a dithering control scheme for photonic synapses. We then numerically simulated the impact with increased synaptic precision on a wireless signal classification application. This work could help realize the potential of photonic neural networks for many practical, real-world tasks.

physics.app-ph↗

arXiv2022

Design Automation of Photonic Resonator Weights

Neuromorphic photonic processors based on resonator weight banks are an emerging candidate technology for enabling modern artificial intelligence (AI) in high speed, analog systems. These purpose-built analog devices implement vector multiplications with the physics of resonator devices, offering efficiency, latency, and throughput advantages over equivalent electronic circuits. Along with these advantages, however, often comes the difficult challenges of compensation for fabrication variations and environmental disturbances. In this paper we review sources of variation and disturbances from our experiments, as well as mathematically define quantities that model them. Then, we introduce how the physics of resonators can be exploited to weight and sum multiwavelength signals. Finally, we outline automated design and control methodologies necessary to create practical, manufacturable, and high accuracy/precision resonator weight banks that can withstand operating conditions in the field. This represents a road map for unlocking the potential of resonator weight banks in practical deployment scenarios.

physics.app-ph↗

arXiv2022

Nanophotonic cavity based synapse for scalable photonic neural networks

The bandwidth and energy demands of neural networks has spurred tremendous interest in developing novel neuromorphic hardware, including photonic integrated circuits. Although an optical waveguide can accommodate hundreds of channels with THz bandwidth, the channel count of photonic systems is always bottlenecked by the devices within. In WDM-based photonic neural networks, the synapses, i.e. network interconnections, are typically realized by microring resonators (MRRs), where the WDM channel count (N) is bounded by the free-spectral range of the MRRs. For typical Si MRRs, we estimate N <= 30 within the C-band. This not only restrains the aggregate throughput of the neural network but also makes applications with high input dimensions unfeasible. We experimentally demonstrate that photonic crystal nanobeam based synapses can be FSR-free within C-band, eliminating the bound on channel count. This increases data throughput as well as enables applications with high-dimensional inputs like natural language processing and high resolution image processing. In addition, the smaller physical footprint of photonic crystal nanobeam cavities offers higher tuning energy efficiency and a higher compute density than MRRs. Nanophotonic cavity based synapse thus offers a path towards realizing highly scalable photonic neural networks.

physics.optics↗

arXiv2021

Silicon photonic-electronic neural network for fibre nonlinearity compensation

In optical communication systems, fibre nonlinearity is the major obstacle in increasing the transmission capacity. Typically, digital signal processing techniques and hardware are used to deal with optical communication signals, but increasing speed and computational complexity create challenges for such approaches. Highly parallel, ultrafast neural networks using photonic devices have the potential to ease the requirements placed on the digital signal processing circuits by processing the optical signals in the analogue domain. Here we report a silicon photonice-lectronic neural network for solving fibre nonlinearity compensation of submarine optical fibre transmission systems. Our approach uses a photonic neural network based on wavelength-division multiplexing built on a CMOS-compatible silicon photonic platform. We show that the platform can be used to compensate optical fibre nonlinearities and improve the signal quality (Q)-factor in a 10,080 km submarine fibre communication system. The Q-factor improvement is comparable to that of a software-based neural network implemented on a 32-bit graphic processing unit-assisted workstation. Our reconfigurable photonic-electronic integrated neural network promises to address pressing challenges in high-speed intelligent signal processing.

physics.app-ph↗

arXiv2021

Photonic spiking neural networks and CMOS-compatible graphene-on-silicon spiking neurons

Spiking neural networks are known to be superior over artificial neural networks for their computational power efficiency and noise robustness. The benefits of spiking coupled with the high-bandwidth and low-latency of photonics can enable highly-efficient, noise-robust, high-speed neural processors. The landscape of photonic spiking neurons consists of an overwhelming majority of excitable lasers and a few demonstrations on nonlinear optical cavities. The silicon platform is best poised to host a scalable photonic technology given its CMOS-compatibility and low optical loss. Here, we present a survey of existing photonic spiking neurons, and propose a novel spiking neuron based on a hybrid graphene-on-silicon microring cavity. A comparison among a representative sample of photonic spiking devices is also presented. Finally, we discuss methods employed in training spiking neural networks, their challenges as well as the application domain that can be enabled by photonic spiking neural hardware.

physics.optics↗

arXiv2019

Programmable Silicon Photonic Optical Thresholder

We experimentally demonstrate an all-optical programmable thresholder on a silicon photonic circuit. By exploiting the nonlinearities in a resonator-enhanced Mach-Zehnder interferometer (MZI), the proposed optical thresholder can discriminate two optical signals with very similar amplitudes. We experimentally achieve a signal contrast enhancement of 40, which leads to a bit error rate (BER) improvement by 5 orders of magnitude and a receiver sensitivity improvement of 11 dB. We present the thresholding function of our device and validate the function with experimental data. Furthermore, we investigate potential device speed improvement by reducing the carrier lifetime.

physics.app-ph↗