arXiv subjects

Adam Paetznick

Publications and source records attributed to Adam Paetznick.

At least 19 recordsLinked to original sources

arXiv2026

Phased outcome-complete simulation

We generalize the polynomial-time outcome-complete simulation algorithm for stabilizer circuits in arXiv:2309.08676 to track global phases exactly, yielding what we call phased outcome-complete simulation. The original algorithm enabled equivalence checking of stabilizer circuits with intermediate measurements and conditional Pauli corrections for all input states and all measurement outcomes simultaneously, but it tracked quantum states only up to a global phase. Our generalization removes this limitation and enables equivalence checking for an important family of non-stabilizer circuits: stabilizer circuits augmented with single-qubit rotations $\exp(i\alpha Z)$ by symbolic angles. Two such circuits are equivalent if they implement the same quantum channel for all values of the symbolic angles and all measurement outcomes, given a one-to-one correspondence between rotation angles in the two circuits and a mapping between measurement outcomes. This model enables testing of compilation algorithms that transform the Clifford portions of a computation while preserving rotation angles. Examples include Pauli-based computation, edge-disjoint path compilation for surface codes, and custom compilation strategies for reversible circuits such as adders, multipliers, and table lookups. Our efficient classical verification methods extend naturally to circuits with outcome-parity-conditional Pauli gates and intermediate measurements, features that are ubiquitous in fault-tolerant quantum computing but are rarely addressed by existing equivalence-checking approaches.

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arXiv2025

Excising dead components in the surface code using minimally invasive alterations: A performance study

The physical implementation of a large-scale error-corrected quantum processor will necessarily need to mitigate the presence of defective (thereby "dead") physical components in its operation, for example, identified during bring-up of the device or detected in the middle of a computation. In the context of solid-state qubits, the quantum error correcting protocol operating in the presence of dead components should ideally (i) use the same native operation set as that without dead components, (ii) maximize salvaging of functional components, and (iii) use a consistent global operating schedule which optimizes logical qubit performance and is compatible with the control requirements of the system. The scheme proposed by Grans-Samuelsson et al. [Quantum 8, 1429 (2024)] satisfies all three of these criteria: it effectively excises (cuts out) dead components from the surface code using minimally invasive alterations (MIA). We conduct extensive numerical simulations of this proposal for the pairwise-measurement-based surface code protocol in the presence of dead components under circuit-level noise. To that end, we also describe techniques to automatically construct performant check (detector) bases directly from circuits without manual circuit annotation, which may be of independent interest. Both the MIA scheme and this automated check basis computation can be readily used with measurement-based as well as CNOT-based circuits, and the results presented here demonstrate state-of-the-art performance.

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arXiv2025

A Topologically Fault-Tolerant Quantum Computer with Four Dimensional Geometric Codes

Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory, and present codes targeted to both near-term and utility-scale quantum computers. We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture. Our design achieves single-shot error correction, significant reductions in required qubits, and low-depth logical operations. In turn, our proposed architecture relaxes the requirements for achieving fault tolerance and offers an efficient path for realization in several near-term quantum hardware implementations. Our [[96,6,8]] 4D Hadamard lattice code has low weight-6 stabilizers and depth-8 syndrome extraction circuits, a high pseudo-threshold of $\sim 0.01$, and a logical error rate of $\sim 10^{-6}$ per logical qubit per round of error correction at $10^{-3}$ physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.

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arXiv2024

Fault-tolerant quantum computation with a neutral atom processor

Quantum computing experiments are transitioning from running on physical qubits to using encoded, logical qubits. Fault-tolerant computation can identify and correct errors, and has the potential to enable the dramatically reduced logical error rates required for valuable algorithms. However, it requires flexible control of high-fidelity operations performed on large numbers of qubits. We demonstrate fault-tolerant quantum computation on a quantum processor with 256 qubits, each an individual neutral Ytterbium atom. The operations are designed so that key error sources convert to atom loss, which can be detected by imaging. Full connectivity is enabled by atom movement. We demonstrate the entanglement of 24 logical qubits encoded into 48 atoms, at once catching errors and correcting for, on average 1.8, lost atoms. We also implement the Bernstein-Vazirani algorithm with up to 28 logical qubits encoded into 112 atoms, showing better-than-physical error rates. In both cases, "erasure conversion," changing errors into a form that can be detected independently from qubit state, improves circuit performance. These results begin to clear a path for achieving scientific quantum advantage with a programmable neutral atom quantum processor.

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arXiv2024

End-to-End Quantum Simulation of a Chemical System

We demonstrate the first end-to-end integration of high-performance computing (HPC), reliable quantum computing, and AI in a case study on catalytic reactions producing chiral molecules. We present a hybrid computation workflow to determine the strongly correlated reaction configurations and estimate, for one such configuration, its active site's ground state energy. We combine 1) the use of HPC tools like AutoRXN and AutoCAS to systematically identify the strongly correlated chemistry within a large chemical space with 2) the use of logical qubits in the quantum computing stage to prepare the quantum ground state of the strongly correlated active site, demonstrating the advantage of logical qubits compared to physical qubits, and 3) the use of optimized quantum measurements of the logical qubits with so-called classical shadows to accurately predict various properties of the ground state including energies. The combination of HPC, reliable quantum computing, and AI in this demonstration serves as a proof of principle of how future hybrid chemistry applications will require integration of large-scale quantum computers with classical computing to be able to provide a measurable quantum advantage.

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arXiv2024

Demonstration of quantum computation and error correction with a tesseract code

A critical milestone for quantum computers is to demonstrate fault-tolerant computation that outperforms computation on physical qubits. The tesseract subsystem color code protects four logical qubits in 16 physical qubits, to distance four. Using the tesseract code on Quantinuum's trapped-ion quantum computers, we prepare high-fidelity encoded graph states on up to 12 logical qubits, beneficially combining for the first time fault-tolerant error correction and computation. We also protect encoded states through up to five rounds of error correction. Using performant quantum software and hardware together allows moderate-depth logical quantum circuits to have an order of magnitude less error than the equivalent unencoded circuits.

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arXiv2023

Advances in compilation for quantum hardware -- A demonstration of magic state distillation and repeat-until-success protocols

Fault-tolerant protocols enable large and precise quantum algorithms. Many such protocols rely on a feed-forward processing of data, enabled by a hybrid of quantum and classical logic. Representing the control structure of such programs can be a challenge. Here we explore two such fault-tolerant subroutines and analyze the performance of the subroutines using Quantum Intermediate Representation (QIR) as their underlying intermediate representation. First, we look at QIR's ability to leverage the LLVM compiler toolchain to unroll the quantum iteration logic required to perform magic state distillation on the $[[5,1,3]]$ quantum error-correcting code as originally introduced by Bravyi and Kitaev [Phys. Rev. A 71, 022316 (2005)]. This allows us to not only realize the first implementation of a real-time magic state distillation protocol on quantum hardware, but also demonstrate QIR's ability to optimize complex program structures without degrading machine performance. Next, we investigate a different fault-tolerant protocol that was first introduced by Paetznick and Svore [arXiv:1311.1074 (2013)], that reduces the amount of non-Clifford gates needed for a particular algorithm. We look at four different implementations of this two-stage repeat-until-success algorithm to analyze the performance changes as the results of programming choices. We find the QIR offers a viable representation for a compiled high-level program that performs nearly as well as a hand-optimized version written directly in quantum assembly. Both of these results demonstrate QIR's ability to accurately and efficiently expand the complexity of fault-tolerant protocols that can be realized today on quantum hardware.

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arXiv2023

Simulation of noisy Clifford circuits without fault propagation

The design and optimization of a large-scale fault-tolerant quantum computer architecture relies extensively on numerical simulations to assess the performance of each component of the architecture. The simulation of fault-tolerant gadgets, which are typically implemented by Clifford circuits, is done by sampling circuit faults and propagating them through the circuit to check that they do not corrupt the logical data. One may have to repeat this fault propagation trillions of times to extract an accurate estimate of the performance of a fault-tolerant gadget. For some specific circuits, such as the standard syndrome extraction circuit for surface codes, we can exploit the natural graph structure of the set of faults to perform a simulation without fault propagation. We propose a simulation algorithm for all Clifford circuits that does not require fault propagation and instead exploits the mathematical structure of the spacetime code of the circuit. Our algorithm, which we name adjoint-based code (ABC) simulation, relies on the fact that propagation forward is the adjoint of propagation backward in the sense of Proposition 3 from [14]. We use this result to replace the propagation of trillions of fault-configurations by the backward propagation of a small number of Pauli operators which can be precomputed once and for all.

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arXiv2023

Splitting decoders for correcting hypergraph faults

The surface code is one of the most popular quantum error correction codes. It comes with efficient decoders, such as the Minimum Weight Perfect Matching (MWPM) decoder and the Union-Find (UF) decoder, allowing for fast quantum error correction. For a general linear code or stabilizer code, the decoding problem is NP-hard. What makes it tractable for the surface code is the special structure of faults and checks: Each X and Z fault triggers at most two checks. As a result, faults can be interpreted as edges in a graph whose vertices are the checks, and the decoding problem can be solved using standard graph algorithms such as Edmonds' minimum-weight perfect matching algorithm. For general codes, this decoding graph is replaced by a hypergraph making the decoding problem more challenging. In this work, we propose two heuristic algorithms for splitting the hyperedges of a decoding hypergraph into edges. After splitting, hypergraph faults can be decoded using any surface code decoder. Due to the complexity of the decoding problem, we do not expect this strategy to achieve a good error correction performance for a general code. However, we empirically show that this strategy leads to a good performance for some classes of LDPC codes because they are defined by low weight checks. We apply this splitting decoder to Floquet codes for which some faults trigger up to four checks and verify numerically that this decoder achieves the maximum code distance for two instances of Floquet codes.

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arXiv2023

Stabilizer circuit verification

The ubiquity of stabilizer circuits in the design and operation of quantum computers makes techniques to verify their correctness essential. The simulation of stabilizer circuits, which aims to replicate their behavior using a classical computer, is known to be efficient and provides a means of testing correctness. However, simulation is limited in its ability to examine the exponentially large space of possible measurement outcomes. We propose a comprehensive set of efficient classical algorithms to fully characterize and exhaustively verify stabilizer circuits with Pauli unitaries conditioned on parities of measurements. We introduce, as a practical characterization, a general form for such circuits and provide an algorithm to find a general form of any stabilizer circuit. We then provide an algorithm for checking the equivalence of stabilizer circuits. When circuits are not equivalent our algorithm suggests modifications for reconciliation. Next, we provide an algorithm that characterizes the logical action of a (physical) stabilizer circuit on an encoded input. All of our algorithms provide relations of measurement outcomes among corresponding circuit representations. Finally, we provide an analytic description of the logical action induced by measuring a stabilizer group, with application in correctness proofs of code-deformation protocols including lattice surgery and code switching.

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arXiv2023

Spacetime codes of Clifford circuits

We propose a scheme for detecting and correcting faults in any Clifford circuit. The scheme is based on the observation that the set of all possible outcome bit-strings of a Clifford circuit is a linear code, which we call the outcome code. From the outcome code we construct a corresponding stabilizer code, the spacetime code. Our construction extends the circuit-to-code construction of Bacon, Flammia, Harrow and Shi [2], revisited recently by Gottesman [16], to include intermediate and multi-qubit measurements. With this correspondence, we reduce the problem of correcting faults in a circuit to the well-studied problem of correcting errors in a stabilizer code. More precisely, a most likely error decoder for the spacetime code can be transformed into a most likely fault decoder for the circuit. We give efficient algorithms to construct the outcome and spacetime codes. We also identify conditions under which these codes are LDPC, and give an algorithm to generate low-weight checks, which can then be combined with effcient LDPC code decoders.

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arXiv2022

Shorter quantum circuits via single-qubit gate approximation

We give a novel procedure for approximating general single-qubit unitaries from a finite universal gate set by reducing the problem to a novel magnitude approximation problem, achieving an immediate improvement in sequence length by a factor of 7/9. Extending the works arXiv:1612.01011 and arXiv:1612.02689, we show that taking probabilistic mixtures of channels to solve fallback (arXiv:1409.3552) and magnitude approximation problems saves factor of two in approximation costs. In particular, over the Clifford+$\sqrt{\mathrm{T}}$ gate set we achieve an average non-Clifford gate count of $0.23\log_2(1/\varepsilon)+2.13$ and T-count $0.56\log_2(1/\varepsilon)+5.3$ with mixed fallback approximations for diamond norm accuracy $\varepsilon$. This paper provides a holistic overview of gate approximation, in addition to these new insights. We give an end-to-end procedure for gate approximation for general gate sets related to some quaternion algebras, providing pedagogical examples using common fault-tolerant gate sets (V, Clifford+T and Clifford+$\sqrt{\mathrm{T}}$). We also provide detailed numerical results for Clifford+T and Clifford+$\sqrt{\mathrm{T}}$ gate sets. In an effort to keep the paper self-contained, we include an overview of the relevant algorithms for integer point enumeration and relative norm equation solving. We provide a number of further applications of the magnitude approximation problems, as well as improved algorithms for exact synthesis, in the Appendices.

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arXiv2022

Performance of planar Floquet codes with Majorana-based qubits

Quantum error correction is crucial for any quantum computing platform to achieve truly scalable quantum computation. The surface code and its variants have been considered the most promising quantum error correction scheme due to their high threshold, low overhead, and relatively simple structure that can naturally be implemented in many existing qubit architectures, such as superconducting qubits. The recent development of Floquet codes offers another promising approach. By going beyond the usual paradigm of stabilizer codes, Floquet codes achieve similar performance while being constructed entirely from two-qubit measurements. This makes them particularly suitable for platforms where two-qubit measurements can be implemented directly, such as measurement-only topological qubits based on Majorana zero modes (MZMs). Here, we explain how two variants of Floquet codes can be implemented on MZM-based architectures without any auxiliary qubits for syndrome measurement and with shallow syndrome extraction sequences. We then numerically demonstrate their favorable performance. In particular, we show that they improve the threshold for scalable quantum computation in MZM-based systems by an order of magnitude, and significantly reduce space and time overheads below threshold.

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arXiv2014

Resource optimization for fault-tolerant quantum computing

In this thesis we examine a variety of techniques for reducing the resources required for fault-tolerant quantum computation. First, we show how to simplify universal encoded computation by using only transversal gates and standard error correction procedures, circumventing existing no-go theorems. We then show how to simplify ancilla preparation, reducing the cost of error correction by more than a factor of four. Using this optimized ancilla preparation, we develop improved techniques for proving rigorous lower bounds on the noise threshold. Additional overhead can be incurred because quantum algorithms must be translated into sequences of gates that are actually available in the quantum computer. In particular, arbitrary single-qubit rotations must be decomposed into a discrete set of fault-tolerant gates. We find that by using a special class of non-deterministic circuits, the cost of decomposition can be reduced by as much as a factor of four over state-of-the-art techniques, which typically use deterministic circuits. Finally, we examine global optimization of fault-tolerant quantum circuits under physical connectivity constraints. We adapt techniques from VLSI in order to minimize time and space usage for computations in the surface code, and we develop a software prototype to demonstrate the potential savings.

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arXiv2013

Repeat-Until-Success: Non-deterministic decomposition of single-qubit unitaries

We present a decomposition technique that uses non-deterministic circuits to approximate an arbitrary single-qubit unitary to within distance $\epsilon$ and requires significantly fewer non-Clifford gates than existing techniques. We develop "Repeat-Until-Success" (RUS) circuits and characterize unitaries that can be exactly represented as an RUS circuit. Our RUS circuits operate by conditioning on a given measurement outcome and using only a small number of non-Clifford gates and ancilla qubits. We construct an algorithm based on RUS circuits that approximates an arbitrary single-qubit $Z$-axis rotation to within distance $\epsilon$, where the number of $T$ gates scales as $1.26\log_2(1/\epsilon) - 3.53$, an improvement of roughly three-fold over state-of-the-art techniques. We then extend our algorithm and show that a scaling of $2.4\log_2(1/\epsilon) - 3.28$ can be achieved for arbitrary unitaries and a small range of $\epsilon$, which is roughly twice as good as optimal deterministic decomposition methods.

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arXiv2013

Dequantizing read-once quantum formulas

Quantum formulas, defined by Yao [FOCS '93], are the quantum analogs of classical formulas, i.e., classical circuits in which all gates have fanout one. We show that any read-once quantum formula over a gate set that contains all single-qubit gates is equivalent to a read-once classical formula of the same size and depth over an analogous classical gate set. For example, any read-once quantum formula over Toffoli and single-qubit gates is equivalent to a read-once classical formula over Toffoli and NOT gates. We then show that the equivalence does not hold if the read-once restriction is removed. To show the power of quantum formulas without the read-once restriction, we define a new model of computation called the one-qubit model and show that it can compute all boolean functions. This model may also be of independent interest.

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arXiv2013

Universal fault-tolerant quantum computation with only transversal gates and error correction

Transversal implementations of encoded unitary gates are highly desirable for fault-tolerant quantum computation. Though transversal gates alone cannot be computationally universal, they can be combined with specially distilled resource states in order to achieve universality. We show that "triorthogonal" stabilizer codes, introduced for state distillation by Bravyi and Haah [Phys. Rev. A 86 052329 (2012)], admit transversal implementation of the controlled-controlled-Z gate. We then construct a universal set of fault-tolerant gates without state distillation by using only transversal controlled-controlled-Z, transversal Hadamard, and fault-tolerant error correction. We also adapt the distillation procedure of Bravyi and Haah to Toffoli gates, improving on existing Toffoli distillation schemes.

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arXiv2013

Quantum circuit optimization by topological compaction in the surface code

The fragile nature of quantum information limits our ability to construct large quantities of quantum bits suitable for quantum computing. An important goal, therefore, is to minimize the amount of resources required to implement quantum algorithms, many of which are serial in nature and leave large numbers of qubits idle much of the time unless compression techniques are used. Furthermore, quantum error-correcting codes, which are required to reduce the effects of noise, introduce additional resource overhead. We consider a strategy for quantum circuit optimization based on topological deformation in the surface code, one of the best performing and most practical quantum error-correcting codes. Specifically, we examine the problem of minimizing computation time on a two-dimensional qubit lattice of arbitrary, but fixed dimension, and propose two algorithms for doing so.

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