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Alan Gara

Publications and source records attributed to Alan Gara.

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The BlueGene/L Supercomputer

The architecture of the BlueGene/L massively parallel supercomputer is described. Each computing node consists of a single compute ASIC plus 256 MB of external memory. The compute ASIC integrates two 700 MHz PowerPC 440 integer CPU cores, two 2.8 Gflops floating point units, 4 MB of embedded DRAM as cache, a memory controller for external memory, six 1.4 Gbit/s bi-directional ports for a 3-dimensional torus network connection, three 2.8 Gbit/s bi-directional ports for connecting to a global tree network and a Gigabit Ethernet for I/O. 65,536 of such nodes are connected into a 3-d torus with a geometry of 32x32x64. The total peak performance of the system is 360 Teraflops and the total amount of memory is 16 TeraBytes.

hep-lat

Status of the QCDSP project

We describe the completed 8,192-node, 0.4Tflops machine at Columbia as well as the 12,288-node, 0.6Tflops machine assembled at the RIKEN Brookhaven Research Center. Present performance as well as our experience in commissioning these large machines is presented. We outline our on-going physics program and explain how the configuration of the machine is varied to support a wide range of lattice QCD problems, requiring a variety of machine sizes. Finally a brief discussion is given of future prospects for large-scale lattice QCD machines.

hep-lat

QCDSP - A status report

The QCDSP machine at Columbia University has grown to 2,048 nodes achieving a peak speed of 100 Gigaflops. Software for quenched and Hybrid Monte Carlo (HMC) evolution schemes has been developed for staggered fermions, with support for Wilson and clover fermions under development. We provide an overview of the runtime environment, the current status of the QCDSP construction program and preliminary results not presented elsewhere in these proceedings.

hep-lat