arXiv subjects

Alexander Ustinov

Publications and source records attributed to Alexander Ustinov.

3 recordsLinked to original sources

arXiv2026

Rethinking Sparse Formats for RISC-V: A Hierarchical Approach to High-Performance SpMV

The sparse matrix-vector multiplication (SpMV) algorithm is a fundamental computational kernel of linear algebra and serves as a building block for numerous applications, primarily iterative solvers for systems of linear equations used in scientific and engineering simulations. This paper compares vectorized implementations of the SpMV algorithm across eight established sparse matrix storage formats and proposes a novel modification of the CSR format, Hierarchical CSR (HCSR), which enhances SpMV performance on RISC-V processors. Our SpMV implementations utilize RVV 1.0 intrinsics and are publicly available as an open-source C++ library named RVVLASparse. Computational experiments conducted on SpacemiT K1 and K3 RISC-V boards demonstrate that selecting an appropriate matrix storage format accelerates SpMV computations by an average of 1.6x, while the proposed HCSR format achieves the shortest execution time among all considered formats across a broad class of sparse matrices.

cs.DC↗

arXiv2025

Performance optimization of BLAS algorithms with band matrices for RISC-V processors

The rapid development of RISC-V instruction set architecture presents new opportunities and challenges for software developers. Is it sufficient to simply recompile high-performance software optimized for x86-64 onto RISC-V CPUs? Are current compilers capable of effectively optimizing C and C++ codes or is it necessary to use intrinsics or assembler? Can we analyze and improve performance without well-developed profiling tools? Do standard optimization techniques work? Are there specific RISC-V features that need to be considered? These and other questions require careful consideration. In this paper, we present our experience optimizing four BLAS algorithms for band matrix operations on RISC-V processors. We demonstrate how RISC-V-optimized implementations of OpenBLAS algorithms can be significantly accelerated through improved vectorization of computationally intensive loops. Experiments on Lichee Pi 4A and Banana Pi BPI-F3 devices using RVV 0.7.1 and RVV 1.0 vector instruction sets respectively, show speedups of 1.5x to 10x depending on the operation compared to the OpenBLAS baseline. In particular, the successful use of vector register grouping with RVV can lead to significant performance improvements.

cs.DC↗

arXiv2018

Improvement of heat exchanger efficiency by using hydraulic and thermal entrance regions

This study investigates one of the possible approaches of improvement of heat exchangers efficiency. Literature review shows that most approaches of improvement are based on the heat transfer surface increasing and laminar-to-turbulent flow transition using different types of riffles forming and shaped inserts. In this article, a novel approach to the heat transfer intensification was employed. The main hypothesis is that applying of multi-chamber design of heat exchanger - ordinary shell-and-tube regions intersperse with common for all tubes regions - will help to improve the utilization of the entrance hydraulic and thermal regions thereby receive higher heat transfer coefficients and higher heat capacity of the heat exchange device. To prove the hypotheses we take the following steps. Firstly, development of the new geometry of the heat-exchanger design - multi chambers construction. Secondly, proving of the higher efficiency of novel design comparing to ordinary design by analytical calculations. Thirdly, numerical simulation of the heat exchange process and fluids flow in both types of heat exchangers that proves the analytical solution.

physics.app-ph↗