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Alvin Y. Sukmadji

Publications and source records attributed to Alvin Y. Sukmadji.

7 recordsLinked to original sources

Performance-Complexity-Latency Trade-offs of Concatenated RS-SDBCH Codes

Concatenated bit-interleaved and multilevel coded modulation with outer Reed--Solomon codes, inner Chase-algorithm-based soft-decision-decoded Bose--Ray-Chaudhuri--Hocquenghem codes, and four-level pulse amplitude modulation is considered. A semi-analytical formula is derived for estimating the decoded frame error rate (FER) at the output of the additive white Gaussian noise channel, obviating the need for time-consuming Monte Carlo simulations. The formula is used to search a large space of codes (including the KP4 code) to find those achieving good trade-offs among performance (measured by the gap to the constrained Shannon limit at $10^{-13}$ FER), complexity (measured by the number of elementary decoder operations), and latency (measured by overall block length).

cs.IT↗

Higher-Order Staircase Codes

We generalize staircase codes and tiled diagonal zipper codes, preserving their key properties while allowing each coded symbol to be protected by arbitrarily many component codewords rather than only two. This generalization which we term "higher-order staircase codes" arises from the marriage of two distinct combinatorial objects: difference triangle sets and finite-geometric nets, which have typically been applied separately to code design. We demonstrate one possible realization of these codes, obtaining powerful, high-rate, low-error-floor, and low-complexity coding schemes based on simple iterative syndrome-domain decoding of coupled Hamming component codes. We anticipate that the proposed codes could improve performance--complexity--latency tradeoffs in high-throughput communications applications, most notably fiber-optic, in which classical staircase codes and zipper codes have been applied. We consider the construction of difference triangle sets having minimum scope and sum-of-lengths, which lead to memory-optimal realizations of higher-order staircase codes. These results also enable memory reductions for early families of convolutional codes constructed from difference triangle sets.

cs.IT↗

Performance-Complexity-Latency Trade-offs of Concatenated RS-SDBCH Codes

Performance-complexity-latency trade-off curves for rate-0.88 concatenated outer Reed--Solomon codes and inner Chase-algorithm-based soft-decision Bose--Ray-Chaudhuri--Hocquenghem codes with PAM4 constellation using bit-interleaved coded modulation and multilevel coding coded modulation schemes over the AWGN channel are presented.

cs.IT↗

Generalized Staircase Codes with Arbitrary Bit Degree

We introduce a natural generalization of staircase codes in which each bit is protected by arbitrarily many component codewords rather than two. This enables powerful energy-efficient FEC based on iterative decoding of Hamming components.

cs.IT↗

Performance-Complexity-Latency Trade-offs of Concatenated RS-BCH Codes

Using a generating function approach, a computationally tractable expression is derived to predict the frame error rate arising at the output of the binary symmetric channel when a number of outer Reed--Solomon codes are concatenated with a number of inner Bose--Ray-Chaudhuri--Hocquenghem codes, thereby obviating the need for time-consuming Monte Carlo simulations. Measuring (a) code performance via the gap to the Shannon limit, (b) decoding complexity via an estimate of the number of operations per decoded bit, and (c) decoding latency by the overall frame length, a code search is performed to determine the Pareto frontier for performance-complexity-latency trade-offs.

cs.IT↗

Generalized Spatially-Coupled Product-Like Codes Using Zipper Codes With Irregular Degree

Zipper codes with irregular variable degree are studied. Two new interleaver maps -- chevron and half-chevron -- are described. Simulation results with shortened double-error-correcting Bose--Chaudhuri--Hocquenghem constituent codes show that zipper codes with chevron and half-chevron interleaver maps outperform staircase codes when the rate is below 0.86 and 0.91, respectively, at $10^{-8}$ output bit error rate operating point. In the miscorrection-free decoding scheme, both zipper codes with chevron and half-chevron interleaver maps outperform staircase codes. However, constituent decoder miscorrections induce additional performance gaps.

cs.IT↗

Zipper Codes

Zipper codes are a framework for describing spatially-coupled product-like codes. Many well-known codes, such as staircase codes and braided block codes, are subsumed into this framework. New types of codes such as tiled diagonal and delayed diagonal zipper codes are introduced along with their software simulation results. Stall patterns that can arise in iterative decoding are analyzed, giving a means of error floor estimation.

cs.IT↗