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Amlan Ganguly

Publications and source records attributed to Amlan Ganguly.

5 recordsLinked to original sources

Memory-Augmented Generative AI for Real-time Wireless Prediction in Dynamic Industrial Environments

Accurate and real-time prediction of wireless channel conditions, particularly the Signal-to-Interference-plus-Noise Ratio (SINR), is a foundational requirement for enabling Ultra-Reliable Low-Latency Communication (URLLC) in highly dynamic Industry 4.0 environments. Traditional physics-based or statistical models fail to cope with the spatio-temporal complexities introduced by mobile obstacles and transient interference inherent to smart warehouses. To address this, we introduce Evo-WISVA (Evolutionary Wireless Infrastructure for Smart Warehouse using VAE), a novel synergistic deep learning architecture that functions as a lightweight 2D predictive digital twin of the radio environment. Evo-WISVA integrates a memory-augmented Variational Autoencoder (VAE) featuring an Attention-driven Latent Memory Module (LMM) for robust, context-aware spatial feature extraction, with a Convolutional Long Short-Term Memory (ConvLSTM) network for precise temporal forecasting and sequential refinement. The entire pipeline is optimized end-to-end via a joint loss function, ensuring optimal feature alignment between the generative and predictive components. Rigorous experimental evaluation conducted on a high-fidelity ns-3-generated industrial warehouse dataset demonstrates that Evo-WISVA significantly surpasses state-of-the-art baselines, achieving up to a 47.6\% reduction in average reconstruction error. Crucially, the model exhibits exceptional generalization capacity to unseen environments with vastly increased dynamic complexity (up to ten simultaneously moving obstacles) while maintaining amortized computational efficiency essential for real-time deployment. Evo-WISVA establishes a foundational technology for proactive wireless resource management, enabling autonomous optimization and advancing the realization of predictive digital twins in industrial communication networks.

eess.SP

AI-Driven Radio Propagation Prediction in Automated Warehouses using Variational Autoencoders

The pervasive demand for data-intensive applications and the rapid integration of emerging technologies are driving an unprecedented transformation in wireless communication, particularly within Industry 4.0. Optimizing 5G and future networks for automated environments like smart warehouses requires advanced solutions for indoor radio propagation. To this end, this paper introduces WISVA (Wireless Infrastructure for Smart Warehouses using VAE), an AI-based framework utilizing a novel Variational Autoencoder (VAE) model (AI Contribution). The VAE's unique architecture learns complex electromagnetic (EM) wave interactions from meticulously crafted, physics-informed data tensors, enabling it to accurately model signal behavior impacted by diverse obstacles. This engineering application provides site specific signal-to-interference-plus-noise ratio (SINR) heatmaps with relative fine granularity for 5G wireless bands in automated Industry 4.0 settings. We demonstrate the remarkable robustness and adaptability of WISVA through its superior performance in spatial field reconstruction tasks, its validation, and, critically, its ability to extrapolate to entirely unseen warehouse layouts and configurations. Comparative analysis via reconstruction error heatmaps reveals WISVA's significantly higher accuracy against traditional autoencoders, establishing its potential as a critical enabler for efficient wireless infrastructure optimization in Industry 4.0.

eess.SP

Neural network execution using nicked DNA and microfluidics

DNA has been discussed as a potential medium for data storage. Potentially it could be denser, could consume less energy, and could be more durable than conventional storage media such as hard drives, solid-state storage, and optical media. However, computing on data stored in DNA is a largely unexplored challenge. This paper proposes an integrated circuit (IC) based on microfluidics that can perform complex operations such as artificial neural network (ANN) computation on data stored in DNA. It computes entirely in the molecular domain without converting data to electrical form, making it a form of in-memory computing on DNA. The computation is achieved by topologically modifying DNA strands through the use of enzymes called nickases. A novel scheme is proposed for representing data stochastically through the concentration of the DNA molecules that are nicked at specific sites. The paper provides details of the biochemical design, as well as the design, layout, and operation of the microfluidics device. Benchmarks are reported on the performance of neural network computation.

cs.ET

A Traffic-Aware Medium Access Control Mechanism for Energy-Efficient Wireless Network-on-Chip Architectures

Wireless interconnection has emerged as an energy efficient solution to the challenges of multi-hop communication over the wireline paths in conventional Networks-on-Chips (NoCs). However, to ensure the full benefits of this novel interconnect technology, design of simple, fair and efficient Medium Access Control (MAC) mechanism to grant access to the on-chip wireless communication channel is needed. Moreover, to adapt to the varying traffic demands from the applications running on a multicore environment, MAC mechanisms should dynamically adjust the transmission slots of the wireless interfaces (WIs). Such dynamic adjustment in transmission slots will result in improving the utilization of the wireless medium in a Wireless NoC (WiNoC). In this paper we present the design of two dynamic MAC mechanisms that adjust the transmission slots of the WIs based on predicted traffic demands and allow partial packet transfer. Through system level simulations, we demonstrate that the traffic aware MAC mechanisms are more energy efficient as well as capable of sustaining higher data bandwidth in WiNoCs.

cs.NI

Energy-Efficient Wireless Interconnection Framework for Multichip Systems with In-package Memory Stacks

Multichip systems with memory stacks and various processing chips are at the heart of platform based designs such as servers and embedded systems. Full utilization of the benefits of these integrated multichip systems need a seamless, and scalable in-package interconnection framework. However, state-of-the-art inter-chip communication requires long wireline channels which increases energy consumption and latency while decreasing data bandwidth. Here, we propose the design of an energy-efficient, seamless wireless interconnection network for multichip systems. We demonstrate with cycle-accurate simulations that such a design reduces the energy consumption and latency while increasing the bandwidth in comparison to modern multichip integration systems.

cs.AR