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Andrea Pulici

Publications and source records attributed to Andrea Pulici.

2 recordsLinked to original sources

Learning Nonlinear Heterogeneity in Physical Kolmogorov-Arnold Networks

Physical neural networks typically train linear synaptic weights while treating device nonlinearities as fixed. We show the opposite - by training the synaptic nonlinearity itself, as in Kolmogorov-Arnold Network (KAN) architectures, we yield markedly higher task performance per physical resource and improved performance-parameter scaling than conventional linear weight-based networks, demonstrating ability of KAN topologies to exploit reconfigurable nonlinear physical dynamics. We experimentally realise physical KANs in silicon-on-insulator devices we term 'Synaptic Nonlinear Elements' (SYNEs), operating at room temperature, microampere currents, 2 MHz speeds and ~750 fJ per nonlinear operation, with no observed degradation over 10^13 measurements and months-long timescales. We demonstrate nonlinear function regression, classification, and prediction of Li-Ion battery dynamics from noisy real-world multi-sensor data. Physical KANs outperform equivalently-parameterised software multilayer perceptron networks across all tasks, with up to two orders of magnitude fewer parameters, and two orders of magnitude fewer devices than linear weight based physical networks. These results establish learned physical nonlinearity as a hardware-native computational primitive for compact and efficient learning systems, and SYNE devices as effective substrates for heterogenous nonlinear computing.

cond-mat.dis-nn

Interface effects and dielectric mismatch in ultrathin silicon on insulator films

The role of interface states and dielectric mismatch is studied in ultrathin P-doped silicon-on-insulator (SOI) films with thickness of the device layer ($H_{SOI}$) varying from 30 to 8 nm and dopant concentration ($n_{D}$) ranging from 10$^{18}$ to nearly 10$^{20}$ cm$^{-3}$. P concentration is determined by Time-of-Flight Secondary Ion Mass Spectrometry (ToF-SIMS). Sample resistivity ($ρ$), carrier concentration ($n_e$), and mobility ($μ_e$) are extracted by combining sheet resistance and Hall measurements in van der Pauw configuration. When $H_{SOI}$ = 30 nm, transport properties at room temperature are fully compatible with those of a similarly doped bulk Si. Progressive 2D confinement by reduction of $H_{SOI}$ below 30 nm results in a reduction of the carrier concentration and a concomitant degradation of $μ_e$. These effects, which are steadily enhanced decreasing $n_D$, are attributed to non-passivated interface states at the SiO$_2$/Si interface and can be significantly mitigated by high temperature rapid thermal oxidation (RTO). The effectiveness of this approach was verified by electron-paramagnetic resonance (EPR) spectra and capacitance-voltage (CV) measurements, which allowed the assessment of the quality of the RTO-SiO$_2$/Si interface and the correlation with observed electrical properties. After effective interface engineering, low temperature electrical characterization revealed a significant increase in P ionization energy in samples with $H_{SOI}$ <= 15 nm, a result directly related to the dielectric mismatch.

cond-mat.mes-hall