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Anirudh Iyengar

Publications and source records attributed to Anirudh Iyengar.

3 recordsLinked to original sources

Building Trust in the Skies: A Knowledge-Grounded LLM-based Framework for Aviation Safety

The integration of Large Language Models (LLMs) into aviation safety decision-making represents a significant technological advancement, yet their standalone application poses critical risks due to inherent limitations such as factual inaccuracies, hallucination, and lack of verifiability. These challenges undermine the reliability required for safety-critical environments where errors can have catastrophic consequences. To address these challenges, this paper proposes a novel, end-to-end framework that synergistically combines LLMs and Knowledge Graphs (KGs) to enhance the trustworthiness of safety analytics. The framework introduces a dual-phase pipeline: it first employs LLMs to automate the construction and dynamic updating of an Aviation Safety Knowledge Graph (ASKG) from multimodal sources. It then leverages this curated KG within a Retrieval-Augmented Generation (RAG) architecture to ground, validate, and explain LLM-generated responses. The implemented system demonstrates improved accuracy and traceability over LLM-only approaches, effectively supporting complex querying and mitigating hallucination. Results confirm the framework's capability to deliver context-aware, verifiable safety insights, addressing the stringent reliability requirements of the aviation industry. Future work will focus on enhancing relationship extraction and integrating hybrid retrieval mechanisms.

cs.SE↗

A Reference-less Slope Detection Technique in 65nm for Robust Sensing of 1T1R Arrays

Spin-Torque-Transfer RAM (STTRAM) is a promising technology however process variation poses serious challenge to sensing. To eliminate bit-to-bit process variation we propose a reference-less, destructive slope detection technique which exploits the MTJ switching from high to low state to detect memory state. A proof-of-concept fabricated test-chip using 96kb mimicked STTRAM bits in 65nm technology shows that slope sensing reduces failure rate by 120X in 2.5K-5K array@TMR=100% and 162X in 2.5K-5K@TMR=80% array compared to conventional voltage sensing.

cs.ET↗

Threshold Voltage-Defined Switches for Programmable Gates

Semiconductor supply chain is increasingly getting exposed to variety of security attacks such as Trojan insertion, cloning, counterfeiting, reverse engineering (RE), piracy of Intellectual Property (IP) or Integrated Circuit (IC) and side-channel analysis due to involvement of untrusted parties. In this paper, we propose transistor threshold voltage-defined switches to camouflage the logic gate both logically and physically to resist against RE and IP piracy. The proposed gate can function as NAND, AND, NOR, OR, XOR, XNOR, INV and BUF robustly using threshold-defined switches. The camouflaged design operates at nominal voltage and obeys conventional reliability limits. The proposed gate can also be used to personalize the design during manufacturing.

cs.CR↗