arXiv subjects

Ansh

Publications and source records attributed to Ansh.

5 recordsLinked to original sources

arXiv2021

Superior Resistance Switching in Monolayer MoS2 Channel Based Gated Binary Resistive RAM via Gate-Bias Dependence and a Unique Forming Process

In this work, we unveil the effect of RS, induced by a current-voltage hysteresis cycles across CVD-grown monolayer MoS2 based gated RRAM, on its transistors electrical and reliability characteristics. A unique gate voltage dependence on the RS is identified which has a remarkable impact on the switching performance of MoS2 RRAM. RS behavior was found to be significantly dependent on the charge conduction in the channel. Moreover, we have shown a potential device forming event when MoS2 gated RRAMs were subjected to a steady-state electrical stress. Both hysteresis and steady state electrical stress were found to disturb the transistor action of these gated RRAMs, which in fact can be used as a signature of RS. Interestingly, current-voltage hysteresis resulted in unipolar RS, whereas steady-state electrical stress before RS measurement led to bipolar RS. Moreover, successive stress cycles of such an electrical stress leads to multiple resistance states, a behavior similar to synaptic properties like long-term potentiation and long-term depression, typically found in memristors. We find that charge transport mechanism dominant in the MoS2 FET in conjunction with steady-state stress induced device forming determine the extent of RS induced in these MoS2 based gated RRAMs. Finally on the basis of insights developed from the dependence on charge transport mechanism and steady-state stress induced forming of MoS2 channel, we propose a certain steady-state electrical stress condition which can be used as a forming process employed prior to use of MoS2 based binary RRAMs for improved switching performance.

physics.app-ph↗

arXiv2020

Electrothermal Transport Induced Material Re Configuration and Performance Degradation of CVD Grown Monolayer MoS2 Transistors

We report, for CVD-grown monolayer MoS2, the very first results on temporal degradation of material and device performance under electrical stress. Both low and high field regimes of operation are explored at different temperatures, gate bias and stress cycles. During low field operation, current is found to saturate after hundreds of seconds of operation with the current decay time constant being a function of temperature and stress cycle. Current saturation after several seconds during low field operation occurs when a thermal equilibrium is established. However, high field operation, especially at low temperature, leads to impact ionization assisted material and device degradation. It is found that high field operation at low temperature results in amorphization of the channel and is verified by device and Kelvin Probe Force Microscopy (KPFM) analyses. In general, a prolonged room temperature operation of CVD-grown MoS2 transistors lead to degraded gate control, higher OFF state current and negative shift in threshold voltage (VT). This is further verified, through micro-Raman and Photoluminescence spectroscopy, which suggest that a steady state DC electrical stress leads to the formation of localized low resistance regions in the channel and a subsequent loss of transistor characteristics. Our findings unveil unique mechanism by which CVD MoS2 undergoes material degradation under electrical stress and subsequent breakdown of transistor behavior. Such an understanding of material and device reliability helps in determining the safe operating regime from device as well as circuit perspective.

physics.app-ph↗

arXiv2019

Chalcogen assisted contact engineering: towards CMOS integration of Tungsten Diselenide Field Effect Transistors

One of the major roadblocks for the establishment of 2D semiconductor technology for CMOS integrated circuits is lack of industry scalable doping techniques that lead to 2D FETs with comparable n-type and p-type behavior. Here we demonstrate a Chalcogen based technique to alter the surface of WSe2 to realize enhanced ambipolar behavior along with a complete transition from n to p-type behavior of WSe2 FETs. The technique involves dry chemistry between Chalcogen atom and TMDC surface which leads to surface states that cause improved hole and electron injection through the FETs. We propose such a technique for realization of all WSe2 based CMOS integrated circuits and therefore unveil its potential towards technology.

physics.app-ph↗

arXiv2019

H2S assisted contact engineering: a universal approach to enhance hole conduction in all TMD Field-Effect Transistors and achieve ambipolar CVD MoS2 Transistors

Unlike Si, 2-dimensional (2D) Transition Metal Dichalcogenides (TMDs) offer atomically thin channels for carrier transport in FETs. Despite advantages like superior gate control, steep sub-threshold swing and high carrier mobility offered by 2D FET channels, process related challenges like lack of selective doping techniques like implantation and CMOS compatible process for fabrication of 2D TMD based FETs hinder the anticipated viability of 2D semiconductor technology for future electronic applications. In this letter, we demonstrate a process oriented approach to realize superior ambipolarity in 2D FETs based on TMDs like Molybdenum disulfide (MoS2), Tungsten disulfide (WS2), Molybdenum diselenide (MoSe2) and Tungsten diselenide (WSe2) by enhancing hole current by multiple orders of magnitude in otherwise strong N-type transistors. The method involves Hydrogen Sulfide (H2S gas) assisted contact engineering of N-type FETs to introduce surface states that alter device behavior. Based on material characterization and bandstructure calculations, physical insights have been developed to understand the effect of such a contact engineering technique. Subsequently, this technique has been demonstrated to alter device behavior by enhancing hole conduction in originally N-type exfoliated (MoS2, WS2, MoSe2 and WSe2) and CVD grown (MoS2) TMD samples to confirm its potential towards enabling the feasibility of 2D semiconductor device technology.

physics.app-ph↗

arXiv2019

Chalcogen Assisted Enhanced Atomic Orbital Interaction at TMDs - Metal Interface & Chalcogen Passivation of TMD Channel For Overall Performance Boost of 2D TMD FETs

Metal-semiconductor interface is a bottleneck for efficient transport of charge carriers through Transition Metal Dichalcogenide (TMD) based field-effect transistors (FETs). Injection of charge carriers across such interfaces is mostly limited by Schottky barrier at the contacts which must be reduced to achieve highly efficient contacts for carrier injection into the channel. Here we introduce a universal approach involving dry chemistry to enhance atomic orbital interaction between various TMDs (MoS2, WS2, MoSe2 and WSe2) & metal contacts has been experimentally demonstrated. Quantum chemistry between TMDs, Chalcogens and metals has been explored using detailed atomistic (DFT & NEGF) simulations, which is then verified using Raman, PL and XPS investigations. Atomistic investigations revealed lower contact resistance due to enhanced orbital interaction and unique physics of charge sharing between constituent atoms in TMDs with introduced Chalcogen atoms which is subsequently validated through experiments. Besides contact engineering, which lowered contact resistance by 72, 86, 1.8, 13 times in MoS2, WS2, MoSe2 and WSe2 respectively, a novel approach to cure / passivate dangling bonds present at the 2D TMD channel surface has been demonstrated. While the contact engineering improved the ON-state performance (ION, gm, mobility and RON) of 2D TMD FETs by orders of magnitude, Chalcogen based channel passivation was found to improve gate control (IOFF, SS, & VTH) significantly. This resulted in an overall performance boost. The engineered TMD FETs were shown to have performance on par with best reported till date.

physics.app-ph↗