arXiv subjects

Arantxa Maestre

Publications and source records attributed to Arantxa Maestre.

4 recordsLinked to original sources

arXiv2026

Graphene FET Process and Analysis Optimization in 200 mm Pilot Line Environment

The maturity of the chemical vapor deposition graphene-based device processing has increased from chip level demonstrations to wafer-scale fabrication in the past few years. Due to this wafer-scale, electrical characterization and analysis of the fabricated devices has become increasingly important to enable extraction of multiple parameters with minimal number of measurements for the quality control purposes critical for industrial uptake of 2D materials-based devices. As a crucial step, we demonstrate optimization of complementary metal-oxide semiconductor (CMOS) back-end-of-line (BEOL) compatible graphene field-effect transistor (GFET) fabrication and analysis including the gate stack, bottom contact, graphene patterning and encapsulation process steps. The analysis methods include atomic force microscopy, scanning electron microscopy and most importantly electrical characterization. The electrical characterization focuses on comparing different test structures and extraction methods for mobility, contact resistance, IV-curve hysteresis and doping parameters. The comparison shows that the selected measurement test structures and analysis methods can have a large impact on the extracted values and should thus be considered when comparing data sets between different sources. The analysis shows that the optimized process offers high device yield of 98 % with good doping uniformity, contact resistance and mobility as well as low IV-curve hysteresis values on 200 mm wafers.

cond-mat.mes-hall↗

arXiv2023

Wafer-scale graphene field-effect transistor biosensor arrays with monolithic CMOS readout

The reliability of analysis is becoming increasingly important as point-of-care diagnostics are transitioning from single analyte detection towards multiplexed multianalyte detection. Multianalyte detection benefits greatly from complementary metal-oxide semiconductor (CMOS) integrated sensing solutions, offering miniaturized multiplexed sensing arrays with integrated readout electronics and extremely large sensor counts. The development of CMOS back end of line integration compatible graphene field-effect transistor (GFET) based biosensing has been rapid during the last few years, both in terms of the fabrication scale-up and functionalization towards biorecognition from real sample matrices. The next steps in industrialization relate to improving reliability and require increased statistics. Regarding functionalization towards truly quantitative sensors and on-chip bioassays with improved statistics require sensor arrays with reduced variability in functionalization. Such multiplexed bioassays, whether based on graphene or on other sensitive nanomaterials, are among the most promising technologies for label-free electrical biosensing. As an important step towards that, we report wafer-scale fabrication of CMOS integrated GFET arrays with high yield and uniformity, designed especially for biosensing applications. We demonstrate the operation of the sensing platform array with 512 GFETs in simultaneous detection for sodium chloride concentration series. This platform offers a truly statistical approach on GFET based biosensing and further to quantitative and multi-analyte sensing. The reported techniques can also be applied to other fields relying on functionalized GFETs, such as gas or chemical sensing or infrared imaging.

cond-mat.mes-hall↗

arXiv2023

Wafer-scale Graphene Electro-absorption Modulators Fabricated in a 300mm CMOS Platform

Graphene-based devices have shown great promise for several applications. For graphene devices to be used in real-world systems, it is necessary to demonstrate competitive device performance, repeatability of results, reliability, and a path to large-scale manufacturing with high yield at low cost. Here, we select single-layer graphene electro-absorption modulators as test vehicle and establish their wafer-scale integration in a 300mm pilot CMOS foundry environment. A hardmask is used to shape graphene, while tungsten-based contacts are fabricated using the damascene approach to enable CMOS-compatible fabrication. By analyzing data from hundreds of devices per wafer, the impact of specific processing steps on the performance could be identified and optimized. After optimization, modulation depth of 50 $\pm$ 4 dB/mm is demonstrated on 400 devices measured using 6 V peak-to-peak voltage. The electro-optical bandwidth is up to 15.1 $\pm$ 1 1.8 GHz for 25$μ$m-long devices. The results achieved are comparable to lab-based record-setting graphene devices of similar design and CVD graphene quality. By demonstrating the reproducibility of the results across hundreds of devices, this work resolves the bottleneck of graphene wafer-scale integration. Furthermore, CMOS-compatible processing enables co-integration of graphene-based devices with other photonics and electronics building blocks on the same chip, and for high-volume low-cost manufacturing.

physics.app-ph↗

arXiv2023

Graphene-Quantum Dot Hybrid Photodetectors from 200 mm Wafer Scale Processing

A 200 mm processing platform for the large-scale production of graphene field-effect transistor-quantum dot (GFET-QD) hybrid photodetectors is demonstrated. Comprehensive statistical analysis of electric data shows a high yield (96%) and low variation of the 200 mm scale fabrication. The GFET-QD devices deliver responsivities of 10${^5}$ - 10${^6}$ V/W in a wavelength range from 400 to 1800 nm, at up to 100 frames per second. Spectral sensitivity compares well to that obtained using similar GFET-QD photodetectors. The device concept enables gate-tunable suppression or enhancement of the photovoltage, which may be exploited for electric shutter operation by toggling between the signal capture and shutter states. The devices show good stability at a wide operation range and external quantum efficiency of 20% in the short-wavelength infrared range. Furthermore, an integration solution with complementary metal-oxide-semiconductor technology is presented to realize image-sensor-array chips and a proof-of-concept image system. This work demonstrates the potential for the volume manufacture of infrared photodetectors for a wide range of imaging applications.

cond-mat.mes-hall↗