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Artur Garcia-Sáez

Publications and source records attributed to Artur Garcia-Sáez.

3 recordsLinked to original sources

On the Impact of Classical and Quantum Communication Networks Upon Modular Quantum Computing Architecture System Performance

Modular architectures are a promising approach to scaling quantum computers beyond the limits of monolithic designs. However, non-local communications between different quantum processors might significantly impact overall system performance. In this work, we investigate the role of the network infrastructure in modular quantum computing architectures, focusing on coherence loss due to communication constraints. We analyze the impact of classical network latency on quantum teleportation and identify conditions under which it becomes a bottleneck. Additionally, we study different network topologies and assess how communication resources affect the number and parallelization of inter-core communications. Finally, we conduct a full-stack evaluation of the architecture under varying communication parameters, demonstrating how these factors influence the overall system performance. The results show that classical communication does not become a bottleneck for systems exceeding one million qubits, given current technology assumptions, even with modest clock frequencies and parallel wired interconnects. Additionally, increasing quantum communication resources generally shortens execution time, although it may introduce additional communication overhead. The optimal number of quantum links between QCores depends on both the algorithm being executed and the chosen inter-core topology. Our findings offer valuable guidance for designing modular architectures, enabling scalable quantum computing.

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An Accurate and Efficient Analytic Model of Fidelity Under Depolarizing Noise Oriented to Large Scale Quantum System Design

Fidelity is one of the most valuable and commonly used metrics for assessing the performance of quantum circuits on error-prone quantum processors. Several approaches have been proposed to estimate circuit fidelity without executing it on quantum hardware, but they often face limitations in scalability or accuracy. In this work, we present a comprehensive theoretical framework to predict the fidelity of quantum circuits under depolarizing noise. Building on theoretical results, we propose an efficient fidelity estimation algorithm based on device calibration data. The method is thoroughly validated through simulation and execution on real hardware, demonstrating improved accuracy compared to state-of-the-art alternatives, with enhancements in prediction $R^2$ ranging from 4.96\% to 213.54\%.. The proposed approach provides a scalable and practical tool for benchmarking quantum hardware, comparing quantum software techniques such as compilation methods, obtaining computation bounds for quantum systems, and guiding hardware design decisions, making it a critical resource for developing and evaluating quantum computing technologies.

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Scalable multi-chip quantum architectures enabled by cryogenic hybrid wireless/quantum-coherent network-in-package

The grand challenge of scaling up quantum computers requires a full-stack architectural standpoint. In this position paper, we will present the vision of a new generation of scalable quantum computing architectures featuring distributed quantum cores (Qcores) interconnected via quantum-coherent qubit state transfer links and orchestrated via an integrated wireless interconnect.

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