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Batuhan Keskin

Publications and source records attributed to Batuhan Keskin.

4 recordsLinked to original sources

Lattice Surgery Aware Resource Analysis for the Mapping and Scheduling of Quantum Circuits for Scalable Modular Architectures

Quantum computing platforms are evolving to a point where placing high numbers of qubits into a single core comes with certain difficulties such as fidelity, crosstalk, and high power consumption of dense classical electronics. Utilizing distributed cores, each hosting logical data qubits and logical ancillas connected via classical and quantum communication channels, offers a promising alternative. However, building such a system for logical qubits requires additional optimizations, such as minimizing the amount of state transfer between cores for inter-core two-qubit gates and optimizing the routing of magic states distilled in a magic state factory. In this work, we investigate such a system and its statistics in terms of classical and quantum resources. First, we restrict our quantum gate set to a universal gate set consisting of CNOT, H, T, S, and Pauli gates. We then developed a framework that can take any quantum circuit, transpile it to our gate set using Qiskit, and then partition the qubits using the KaHIP graph partitioner to balanced partitions. Afterwards, we built an algorithm to map these graphs onto the 2D mesh of quantum cores by converting the problem into a Quadratic Assignment Problem with Fixed Assignment (QAPFA) to minimize the routing of leftover two-qubit gates between cores and the total travel of magic states from the magic state factory. Following this stage, the gates are scheduled using an algorithm that takes care of the timing of the gate set. As a final stage, our framework reports detailed statistics such as the number of classical communications, the number of EPR pairs and magic states consumed, and timing overheads for pre- and post- processing for inter-core state transfers. These results help to quantify both classical and quantum resources that are used in distributed logical quantum computing architectures.

quant-ph

Power Delivery for Cryogenic Scalable Quantum Applications: Challenges and Opportunities

Quantum technologies offer unprecedented capabilities in computation and secure information transfer. Their implementation requires qubits to operate at cryogenic temperatures (CT) while control and readout electronics typically still remains at room temperature (RT). As systems scale to millions of qubits, the electronics should also operate at CT to avoid a wiring bottleneck. However, wired power transfer from RT for such electronics introduces severe challenges, including thermal load between cooling stages, Joule heating, noise coupling, and wiring scalability. This paper addresses those challenges by evaluating several candidate architectures for scalable power transfer in the dilution frige: high-voltage (HV) wired power transfer, radiative wireless transfer, non-radiative wireless transfer, and a hybrid HV and non-radiative transfer. These architectures are analyzed in terms of thermal load, power loss, heating, coupling noise, power density, scalability, reliability, and complexity. Comparative analysis demonstrates the trade-offs among these architectures, while highlighting HV non-radiative transfer as a promising candidate for scalable quantum systems.

eess.SY

On the Impact of Classical and Quantum Communication Networks Upon Modular Quantum Computing Architecture System Performance

Modular architectures are a promising approach to scaling quantum computers beyond the limits of monolithic designs. However, non-local communications between different quantum processors might significantly impact overall system performance. In this work, we investigate the role of the network infrastructure in modular quantum computing architectures, focusing on coherence loss due to communication constraints. We analyze the impact of classical network latency on quantum teleportation and identify conditions under which it becomes a bottleneck. Additionally, we study different network topologies and assess how communication resources affect the number and parallelization of inter-core communications. Finally, we conduct a full-stack evaluation of the architecture under varying communication parameters, demonstrating how these factors influence the overall system performance. The results show that classical communication does not become a bottleneck for systems exceeding one million qubits, given current technology assumptions, even with modest clock frequencies and parallel wired interconnects. Additionally, increasing quantum communication resources generally shortens execution time, although it may introduce additional communication overhead. The optimal number of quantum links between QCores depends on both the algorithm being executed and the chosen inter-core topology. Our findings offer valuable guidance for designing modular architectures, enabling scalable quantum computing.

quant-ph

On Bailey pairs for $\mathcal N=2$ supersymmetric gauge theories on $S_b^3/\mathbb{Z}_r$

We study Bailey pairs construction for hyperbolic hypergeometric integral identities acquired via the duality of lens partitions functions for the three-dimensional $\mathcal N=2$ supersymmetric gauge theories on $S_b^3/\mathbb{Z}_r$. The novel Bailey pairs are constructed for the star-triangle relation, the star-star relation and the pentagon identity. The first two of them are integrability conditions for the Ising-type integrable lattice models. The last one corresponds to the representation of the basic $2-3$ Pachner move for triangulated 3-manifolds.

hep-th