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Ben Kaczer

Publications and source records attributed to Ben Kaczer.

6 recordsLinked to original sources

Wafer-Level 1/f Noise Characterization of Scaled P-Type Nanosheets and Comparison with Planar HKMG Transistors

We present a comprehensive wafer-level 1/f noise study of scaled Gate-All-Around (GAA) p-type nanosheet transistors and benchmark them against large-area planar High- \k{appa} Metal Gate (HKMG) devices to assess the impact of device architecture on reliability. By statistically analyzing noise data from 188 nanosheets, we extract the effective trap density in the dielectric and compare it to that of planar transistors with identical gate stack, comparable processing thermal budgets, and no specific reliability anneals. The effective trap density extracted from 1/f noise is comparable in planar and nanosheet architectures. This indicates that transitioning to GAA nanosheets does not increase noise, which remains governed by gate stack quality.

cond-mat.mes-hall

Revealing the Partially Coherent Nature of Transport in IGZO

Thin-film transistors based on amorphous oxide semiconductors (AOS) are promising candidates for enabling further DRAM scaling and 3D integration, which are critical for advanced computing. Despite extensive research, the charge transport mechanism in these disordered semiconductors remains poorly understood. In this work, we investigate charge transport in the archetypical AOS material, indium gallium zinc oxide (IGZO), across a range of compositions and temperatures using thin-film transistors and Hall bar structures. Our results show that the electrons involved in transport exhibit partially spatial coherence and non-degenerate conduction. Under these conditions, transport is dominated by electron transfer across insulating gaps between locally coherent regions, rather than by degenerate percolative transport above a mobility edge, or by localized-state hopping, both of which are widely assumed in the literature. While fluctuation-induced tunnelling has previously been invoked to describe low-temperature transport in oxide transistors, we show that such behavior originates from partially coherent electronic states and develop a field-effect-aware fluctuation-induced tunnelling (FEAFIT) framework that explicitly accounts for gate modulation of the tunneling landscape. The FEAFIT model accurately predicts experimental data across all compositions, temperatures, and gate voltages, enabling extraction of fundamental transport parameters. These tunnelling parameters are then correlated with electron coherence dimensions and the degree of energetic disorder obtained from first-principles calculations. Our findings advance the fundamental understanding of charge transport in AOS-based transistors and provide a foundation for further performance improvements

cond-mat.mtrl-sci

Investigation of Low Frequency Noise in CryoCMOS devices through Statistical Single Defect Spectroscopy

High 1/f noise in CryoCMOS devices is a critical parameter to keep under control in the design of complex circuits for low temperatures applications. Current models predict the 1/f noise to scale linearly with temperature, and gate oxide defects are expected to freeze out at cryogenic temperatures. Nevertheless, it has been repeatedly observed that 1/f noise deviates from the predicted behaviour and that gate oxide defects are still active around 4.2 K, producing random telegraph noise. In this paper, we probe single gate oxide defects in 2500 nMOS devices down to 5 K in order to investigate the origin of 1/f noise in CryoCMOS devices. From our results, it is clear that the number of defects active at cryogenic temperatures resulting in random telegraph noise is larger than at 300 K. Threshold voltage shifts due to charged defects are shown to be exponentially distributed, with different modalities across temperatures and biases: from monomodal at 300 K to trimodal below 100 K. The third mode is interpreted in the framework of percolation theory. By fitting these distributions, it is shown that more than 80% of the detected defects belongs to the oxide bulk. Afterwards, starting from the raw data in time domain, we reconstruct the low frequency noise spectra, highlighting the contributions of defects belonging to different branches and, therefore, to different oxide layers. This analysis shows that, although interface traps and large defects associated with the third mode are the main sources of 1/f noise at 5 K, bulk oxide defects still contribute significantly to low-frequency noise at cryogenic temperatures. Finally, we show that defect time constants and step heights are uncorrelated, proving that elastic tunnelling model for charge trapping is not accurate.

cond-mat.mes-hall

Comphy v3.0 -- A Compact-Physics Framework for Modeling Charge Trapping Related Reliability Phenomena in MOS Devices

Charge trapping plays an important role for the reliability of electronic devices and manifests itself in various phenomena like bias temperature instability (BTI), random telegraph noise (RTN), hysteresis or trap-assisted tunneling (TAT). In this work we present Comphy v3.0, an open source physical framework for modeling these effects in a unified fashion using nonradiative multiphonon theory on a one-dimensional device geometry. Here we give an overview about the underlying theory, discuss newly introduced features compared to the original Comphy framework and also review recent advances in reliability physics enabled by these new features. The usefulness of Comphy v3.0 for the reliability community is highlighted by several practical examples including automatic extraction of defect distributions, modeling of TAT in high-k capacitors and BTI/RTN modeling at cryogenic temperatures.

physics.app-ph

Physics-Based and Closed-Form Model for Cryo-CMOS Subthreshold Swing

Cryogenic semiconductor device models are essential in designing control systems for quantum devices and in benchmarking the benefits of cryogenic cooling for high-performance computing. In particular, the saturation of subthreshold swing due to band tails is an important phenomenon to include in low-temperature analytical MOSFET models as it predicts theoretical lower bounds on the leakage power and supply voltage in tailored cryogenic CMOS technologies with tuned threshold voltages. Previous physics-based modeling required to evaluate functions with no closed-form solutions, defeating the purpose of fast and efficient model evaluation. Thus far, only the empirically proposed expressions are in closed form. This article bridges this gap by deriving a physics-based and closed-form model for the full saturating trend of the subthreshold swing from room down to low temperature. The proposed model is compared against experimental data taken on some long and short devices from a commercial 28-nm bulk CMOS technology down to 4.2 K.

cond-mat.mes-hall

NBTI in Nanoscale MOSFETs - The Ultimate Modeling Benchmark

After nearly half a century of research into the bias temperature instability (BTI), two classes of models have emerged as the strongest contenders: one class of models, the reaction-diffusion models, is built around the idea that hydrogen is released from the interface and that it is the diffusion of some form of hydrogen that controls both degradation and recovery. While many different variants of the reaction-diffusion idea have been published over the years, the most commonly used recent models are based on non-dispersive reaction rates and non- dispersive diffusion. The other class of models is based on the idea that degradation is controlled by first-order reactions with widely distributed (dispersive) reaction rates. We demonstrate that these two classes give fundamentally different predictions for the stochastic degradation and recovery of nanoscale devices, therefore providing the ultimate modeling benchmark. Using de- tailed experimental time-dependent defect spectroscopy (TDDS) data obtained on such nanoscale devices, we investigate the compatibility of these models with experiment. Our results show that the diffusion of hydrogen (or any other species) is unlikely to be the limiting aspect that determines degradation. On the other hand, the data are fully consistent with reaction-limited models. We finally argue that only the correct understanding of the physical mechanisms leading to the significant device-to-device variation observed in the degradation in nanoscale devices will enable accurate reliability projections and device optimization.

cond-mat.mes-hall