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Benoit Charbonnier

Publications and source records attributed to Benoit Charbonnier.

11 recordsLinked to original sources
arXiv2026

Spiking Photonic Neurons Based on Two-Section InP Quantum-Well Lasers Integrated on Silicon

In this work we experimentally investigate the spiking dynamics of two-section InP quantum-well lasers monolithically integrated on silicon. By appropriately tuning the electrical bias conditions, we realize multiple neuronal-like operating regimes, such as integrate-and-fire and resonate-and-fire, highlighting the device's versatility as a high-speed photonic neuron. A systematic investigation of laser design parameters, including cavity length and gain/saturable absorber ratio, elucidates their impact on spiking-related properties (such as pulse repetition frequency) and traces the operational parameter space that unlocks stable spiking. Finally, these findings pave the way toward scalable neuromorphic photonic integrated circuits, where low-loss silicon synapses coexist with versatile laser neurons.

physics.optics↗
arXiv2026

High-Speed Non-Volatile Barium Titanate Field Programmable Photonic Gate Array

Programmable integrated photonics aims to replicate the versatility of field-programmable gate arrays in the optical domain. However, scaling these systems has been prevented by the high power consumption and thermal crosstalk of conventional volatile phase shifters. Here, we demonstrate the first non-volatile field-programmable photonic gate array, implemented on a hybrid silicon-barium titanate platform. Unlike traditional thermo-optic devices that require constant power to maintain a state, our device utilizes ferroelectric domain switching to provide non-volatile memory, allowing optical circuits to be programmed and retained without any holding power or electrical bias. The hexagonal waveguide mesh integrates 58 programmable unit cells and 116 actuators, achieving nanosecond-scale switching speeds of 80 nanoseconds while reducing static power consumption to negligible levels (560 nanowatts per {\pi} phase shift). To validate this platform, we configured the mesh to perform diverse signal processing functions, including tunable filtering, 4x4 linear unitary transformations, and optical routing. This work establishes non-volatile ferroelectric silicon photonics as a scalable, heat-free platform essential for the next generation of energy-efficient photonic computing.

physics.optics↗
arXiv2025

A Segmented Heater-Driven, Low-Loss, Reconfigurable Photonic Phase-Change Material-Based Phase Shifter

Phase-change material (PCM)-based non-volatile multilevel phase shifters are key components in photonic integrated circuits. Electrically, multiple phase levels can be encoded by controlling the heater power and employing different microheater architectures to induce varying degrees of PCM amorphization. However, encoding a large number of levels is not straightforward. In this work, we first investigate a phase shifter structure based on a GeSe PCM integrated on top of a silicon-on-insulator waveguide, employing a simple rectangular-shaped heater under pulse-width modulation (PWM). We numerically demonstrate that multilevel phase shifts can be achieved because of non-uniform heating in the GeSe PCM layer. However, the resulting phase levels for this basic configuration are highly non-linear because of the uniform power dissipation along the light propagation direction characterized by the same cross-section. To overcome this limitation, we designed a novel PCM-based phase shifter with a segmented heater whose width gradually increases along the light propagation direction. This configuration enables the encoding of hundreds of well-spaced phase levels between 0 and $\pi$, facilitated by smoother amorphization arising from the combined effects of non-uniform heating across segments and within each segment, while achieving an insertion loss of only 0.6 dB in the worst case. Furthermore, when evaluating both heater architectures under pulse amplitude modulation (PAM) at a fixed pulse duration, we observe behavior consistent with the trends observed for PWM, confirming the superior performance of the segmented heater design.

physics.optics↗
arXiv2025

LightPro: A Linear Photonic Processor with Full Programmability

In this paper, we propose a novel fully programmable linear photonic processor, which we call LightPro, with improved scalability, performance, and footprint. At the heart of LightPro are compact, low-loss, and programmable silicon photonic (SiPh) directional coupler (DC) devices that deploy phase-change material (PCM) for programming the DC's splitting ratio. By thermally inducing phase transitions in the PCM, the coupling coefficient of the DC can be dynamically adjusted to achieve different splitting ratios in the device output. Building on this device foundation, we develop a neural architecture search (NAS) and pruning algorithm to optimize the architecture of the processor for performing MVM operations. Our simulation results show that LightPro achieves up to an 85% reduction in footprint and more than 50% improvement in power consumption. In addition, LightPro is evaluated by performing inference with weight matrices trained on MNIST and linearly separable Gaussian datasets, showing less than a 5% drop in accuracy when scaling up the network. Prototyping results, using a commercial photonic processor (iPronics SmartLight), show LightPro's efficiency and performance (e.g., computational accuracy) compared to conventional photonic MVM hardware, demonstrating the experimental evaluation and feasibility of LightPro for next-generation photonic AI accelerators.

physics.optics↗
arXiv2025

Roadmap on Neuromorphic Photonics

This roadmap consolidates recent advances while exploring emerging applications, reflecting the remarkable diversity of hardware platforms, neuromorphic concepts, and implementation philosophies reported in the field. It emphasizes the critical role of cross-disciplinary collaboration in this rapidly evolving field.

cs.ET↗
arXiv2024

Invited: Neuromorphic architectures based on augmented silicon photonics platforms

In this work, we discuss our vision for neuromorphic accelerators based on integrated photonics within the framework of the Horizon Europe NEUROPULS project. Augmented integrated photonic architectures that leverage phase-change and III-V materials for optical computing will be presented. A CMOS-compatible platform will be discussed that integrates these materials to fabricate photonic neuromorphic architectures, along with a gem5-based simulation platform to model accelerator operation once it is interfaced with a RISC-V processor. This simulation platform enables accurate system-level accelerator modeling and benchmarking in terms of key metrics such as speed, energy consumption, and footprint.

cs.ET↗
arXiv2023

COMET: A Cross-Layer Optimized Optical Phase Change Main Memory Architecture

Traditional DRAM-based main memory systems face several challenges with memory refresh overhead, high latency, and low throughput as the industry moves towards smaller DRAM cells. These issues have been exacerbated by the emergence of data-intensive applications in recent years. Memories based on phase change materials (PCMs) offer promising solutions to these challenges. PCMs store data in the material's phase, which can shift between amorphous and crystalline states when external thermal energy is supplied. This is often achieved using electrical pulses. Alternatively, using laser pulses and integration with silicon photonics offers a unique opportunity to realize high-bandwidth and low-latency photonic memories. Such a memory system may in turn open the possibility of realizing fully photonic computing systems. But to realize photonic memories, several challenges that are unique to the photonic domain such as crosstalk, optical loss management, and laser power overhead have to be addressed. In this work, we present COMET, the first cross-layer optimized optical main memory architecture that uses PCMs. In architecting COMET, we explore how to use silicon photonics and PCMs together to design a large-scale main memory system while addressing associated challenges. We explore challenges and propose solutions at the PCM cell, photonic memory circuit, and memory architecture levels. Based on our evaluations, COMET offers 7.1x better bandwidth, 15.1x lower EPB, and 3x lower latencies than the best-known prior work on photonic main memory architecture design.

cs.AR↗
arXiv2023

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS

This special session paper introduces the Horizon Europe NEUROPULS project, which targets the development of secure and energy-efficient RISC-V interfaced neuromorphic accelerators using augmented silicon photonics technology. Our approach aims to develop an augmented silicon photonics platform, an FPGA-powered RISC-V-connected computing platform, and a complete simulation platform to demonstrate the neuromorphic accelerator capabilities. In particular, their main advantages and limitations will be addressed concerning the underpinning technology for each platform. Then, we will discuss three targeted use cases for edge-computing applications: Global National Satellite System (GNSS) anti-jamming, autonomous driving, and anomaly detection in edge devices. Finally, we will address the reliability and security aspects of the stand-alone accelerator implementation and the project use cases.

cs.AR↗
arXiv2023

Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies

The field of neuromorphic computing has been rapidly evolving in recent years, with an increasing focus on hardware design and reliability. This special session paper provides an overview of the recent developments in neuromorphic computing, focusing on hardware design and reliability. We first review the traditional CMOS-based approaches to neuromorphic hardware design and identify the challenges related to scalability, latency, and power consumption. We then investigate alternative approaches based on emerging technologies, specifically integrated photonics approaches within the NEUROPULS project. Finally, we examine the impact of device variability and aging on the reliability of neuromorphic hardware and present techniques for mitigating these effects. This review is intended to serve as a valuable resource for researchers and practitioners in neuromorphic computing.

cs.ET↗
arXiv2023

Design Space Exploration for PCM-based Photonic Memory

The integration of silicon photonics (SiPh) and phase change materials (PCMs) has created a unique opportunity to realize adaptable and reconfigurable photonic systems. In particular, the nonvolatile programmability in PCMs has made them a promising candidate for implementing optical memory systems. In this paper, we describe the design of an optical memory cell based on PCMs while exploring the design space of the cell in terms of PCM material choice (e.g., GST, GSST, Sb2Se3), cell bit capacity, latency, and power consumption. Leveraging this design-space exploration for the design of efficient optical memory cells, we present the design and implementation of an optical memory array and explore its scalability and power consumption when using different optical memory cells. We also identify performance bottlenecks that need to be alleviated to further scale optical memory arrays with competitive latency and energy consumption, compared to their electronic counterparts.

cs.ET↗