arXiv subjects

Bhaswar Chakrabarti

Publications and source records attributed to Bhaswar Chakrabarti.

6 recordsLinked to original sources

arXiv2024

Stochastic Analysis of Retention Time of Coupled Memory Topology

Recently, it has been experimentally demonstrated that individual memory units coupled in certain topology can provide the intended performance. However, experimental or simulation based evaluation of different coupled memory topologies and materials are costly and time consuming. In this paper, inspired by Glauber dynamics models in non-equilibrium statistical mechanics, we propose a physically accurate generic mathematical framework for analyzing retention times of various coupled memory topologies and materials. We demonstrate efficacy of the proposed framework by deriving closed form expressions for a few popular coupled and uncoupled memory topologies, which match simulations. Our analysis also offers analytical insights helping us estimate the impact of materials and topologies on retention time.

cs.ET↗

arXiv2024

NeoHebbian Synapses to Accelerate Online Training of Neuromorphic Hardware

Neuromorphic systems that employ advanced synaptic learning rules, such as the three-factor learning rule, require synaptic devices of increased complexity. Herein, a novel neoHebbian artificial synapse utilizing ReRAM devices has been proposed and experimentally validated to meet this demand. This synapse features two distinct state variables: a neuron coupling weight and an "eligibility trace" that dictates synaptic weight updates. The coupling weight is encoded in the ReRAM conductance, while the "eligibility trace" is encoded in the local temperature of the ReRAM and is modulated by applying voltage pulses to a physically co-located resistive heating element. The utility of the proposed synapse has been investigated using two representative tasks: first, temporal signal classification using Recurrent Spiking Neural Networks (RSNNs) employing the e-prop algorithm, and second, Reinforcement Learning (RL) for path planning tasks in feedforward networks using a modified version of the same learning rule. System-level simulations, accounting for various device and system-level non-idealities, confirm that these synapses offer a robust solution for the fast, compact, and energy-efficient implementation of advanced learning rules in neuromorphic hardware.

cs.ET↗

arXiv2023

Thermal Crosstalk Analysis in RRAM Passive Crossbar Arrays

As the packing density of resistive random access memory (RRAM) devices increases, the effect of thermal cross-talk across the devices in a crossbar array arrangement influences their overall operation significantly. The electro-thermal effects in a densely packed RRAM crossbar can accelerate the retention and endurance degradation; hence poses a serious reliability threat. This paper systematically investigates the electro-thermal effects in passive RRAM crossbar arrays using COMSOL multi-physics simulations. Furthermore, we propose a methodology to model the thermal cross-talk effect and incorporate it in a SPICE-compatible physics-based RRAM compact model. Finally, we demonstrate the impact of thermal coupling on RRAM crossbar array operation in terms of vector-matrix multiplication using calibrated SPICE simulations.

cs.ET↗

arXiv2022

A Co-design view of Compute in-Memory with Non-Volatile Elements for Neural Networks

Deep Learning neural networks are pervasive, but traditional computer architectures are reaching the limits of being able to efficiently execute them for the large workloads of today. They are limited by the von Neumann bottleneck: the high cost in energy and latency incurred in moving data between memory and the compute engine. Today, special CMOS designs address this bottleneck. The next generation of computing hardware will need to eliminate or dramatically mitigate this bottleneck. We discuss how compute-in-memory can play an important part in this development. Here, a non-volatile memory based cross-bar architecture forms the heart of an engine that uses an analog process to parallelize the matrix vector multiplication operation, repeatedly used in all neural network workloads. The cross-bar architecture, at times referred to as a neuromorphic approach, can be a key hardware element in future computing machines. In the first part of this review we take a co-design view of the design constraints and the demands it places on the new materials and memory devices that anchor the cross-bar architecture. In the second part, we review what is knows about the different new non-volatile memory materials and devices suited for compute in-memory, and discuss the outlook and challenges.

cs.ET↗

arXiv2021

2D-Motion Detection using SNNs with Graphene-Insulator-Graphene Memristive Synapses

The event-driven nature of spiking neural networks makes them biologically plausible and more energy-efficient than artificial neural networks. In this work, we demonstrate motion detection of an object in a two-dimensional visual field. The network architecture presented here is biologically plausible and uses CMOS analog leaky integrate-and-fire neurons and ultra-low power multi-layer RRAM synapses. Detailed transistorlevel SPICE simulations show that the proposed structure can accurately and reliably detect complex motions of an object in a two-dimensional visual field.

cs.NE↗

arXiv2021

Quasi-HfO$_x$/ AlO$_y$ and AlO$_y$/ HfO$_x$ Based Memristor Devices: Role of Bi-layered Oxides in Digital Set and Analog Reset Switching

Understanding the resistive switching behavior, or the resistance change, of oxide-based memristor devices, is critical to predicting their responses with known electrical inputs. Also, with the known electrical response of a memristor, one can confirm its usefulness in non-volatile memory and/or in artificial neural networks. Although bi- or multi-layered oxides have been reported to improve the switching performance, compared to the single oxide layer, the detailed explanation about why the switching can easily be improved for some oxides combinations is still missing. Herein, we fabricated two types of bi-layered heterostructure devices, quasi-HfO$_x$/AlO$_y$ and AlO$_y$/HfO$_x$ sandwiched between Au electrodes, and their electrical responses are investigated. For a deeper understanding of the switching mechanism, the performance of a HfOx only device is also considered, which serves as a control device. The role of bi-layered heterostructures is investigated using both the experimental and simulated results. Our results suggest that synergistic switching performance can be achieved with a proper combination of these materials and/or devices. These results open the avenue for designing more efficient double- or multi-layers memristor devices for an analog response.

physics.app-ph↗