arXiv subjects

Brahmdutta Dixit

Publications and source records attributed to Brahmdutta Dixit.

4 recordsLinked to original sources

arXiv2026

Epitaxial Strain Activates Altermagnetic Spin-Splitting Torques in RuO2(100)

The altermagnetic nature of rutile RuO2 remains under active debate: bulk measurements indicate a nearly nonmagnetic ground state, whereas thin-film studies have reported symmetry-dependent transport signatures consistent with altermagnetism. Here, we provide experimental evidence that altermagnetic spin splitting in RuO2 is a strain-stabilized emergent state rather than an intrinsic bulk property. Angular-resolved spin-torque measurements reveal a symmetry-selected spin Hall response characteristic of altermagnetic spin splitting, which is strongest in the strained regime but progressively suppressed as the lattice relaxes toward the bulk limit. Complementary magnetic measurements further reveal enhanced coercivity and exchange-bias behavior exclusively in strained films, indicating the emergence of a strain-stabilized magnetic state. First-principles calculations reproduce the strain-dependent evolution of the Neel order and spin-split electronic structure, supporting the experimental observations. Together, these results establish altermagnetic spin splitting in RuO2 as a strain-stabilized emergent state and provide a unified explanation for the long-standing discrepancy between bulk and thin-film observations.

cond-mat.mtrl-sci↗

arXiv2026

CRAM-ER: Error-Resilient Spintronic Computational Random Access Memory for Scalable In-Memory Computation

Deep neural networks (DNNs) have achieved state-of-the-art performance across diverse domains. However, typical Von Neumann compute paradigms face severe memory bottlenecks. Emerging near-memory and compute-in-memory approaches alleviate this but incur significant peripheral overhead. Computational Random Access Memory (CRAM) based on MRAM enables in-situ logic without peripheral overhead, offering a dense, energy-efficient solution. However, probabilistic MRAM switching induces gate-level errors that limit the scalability and reliability of CRAM for accelerating DNN. Moreover, the large number of sequential MRAM writes severely constrains CRAM throughput. To address these challenges, we propose an error-resilient CRAM (CRAM-ER) architecture for scalable in-memory matrix-vector multiplications (MVMs). Our error-aware hardware-software co-design framework leverages a hybrid spintronic-CRAM + CMOS adder-tree architecture to mitigate the impact of device-level errors, demonstrating MVM functionality with high area and energy efficiency. We further develop an error-aware model fine-tuning and fine-grained error correction for enhanced error resilience. Evaluations of the CMOS+spintronic hybrid architecture on DNN benchmarks show near-lossless accuracy while reducing CRAM latency by up to 2 orders of magnitude, outperforming CPU/GPU+high-bandwidth DRAM in both energy efficiency and energy-delay product.

cs.AR↗

arXiv2025

Demonstration of Electron-Mediated Voltage-Controlled Exchange Coupling in Perpendicular Magnetic Tunnel Junctions

Electron-mediated voltage control of exchange coupling (EM-VCEC) has been proposed as a mechanism for magnetization switching via modulation of spin-dependent electron reflection. However, its experimental verification has been challenging due to the coexistence of slower, voltage-induced ionic effects. Here, we fabricate magnetic tunnel junction (MTJ) devices that enable nanosecond timescale voltage application. Our results reveal rapid exchange coupling modulation on the nanosecond timescale, consistent with an electronic origin. The observed enhancement and saturation at low temperatures further rule out ionic migration, conclusively confirming the electronic nature of the mechanism. These results establish EM-VCEC as a viable mechanism for fast and energy-efficient voltage-driven magnetic switching.

physics.app-ph↗

arXiv2025

Modulation of switching dynamics in magnetic tunnel junctions for low-error-rate computational random-access memory

The conventional computer architecture has been facing challenges answering the ever-increasing demands from emerging applications, such as AI, for energy-efficient computation and memory hardware systems. Computational Random Access Memory (CRAM) represents a true in-memory computing paradigm that integrates logic and memory functions within the same array. At its core, CRAM relies on Magnetic Tunnel Junctions (MTJs), which serve as the foundational building blocks for implementing both memory storage and logic operations. However, a key challenge in CRAM lies in the non-ideal error rates associated with switching dynamics of MTJs, necessitating innovative approaches to reduce errors and optimize logic margins. This work proposes a novel approach of utilizing the voltage-controlled magnetic anisotropy (VCMA) to steepen the switching probability transfer curve (SPTC), thereby significantly reducing the logic operation error rate in CRAM. Using several numerical modeling tools, we validate the effectiveness of VCMA in modulating the energy barrier and switching dynamics in MTJs. It is revealed that the VCMA effect significantly reduces the error rate of CRAM by 61.43% at a VCMA coefficient of 200 fJ/V/m compared to CRAM without VCMA. The reduction of error rate is further rapidly amplified with an increasing TMR ratio. Furthermore, the introduction of the VCMA effect decreases the logic voltage (Vlogic) required for logic operations in CRAM and results in reduction of energy consumption. Our work serves as a first exploration in reducing the error rate in CRAM by modifying SPTC in MTJs.

cs.ET↗