Brandon P. Hippe | Searcharxiv

arXiv2026

Python-based RTL Generator Demonstrated on a Low-IF 2-FSK Wireless Communication System

Hardware optimization is critical in the design of efficient wireless communication systems. Wireless communication hardware often consumes a significant fraction of the total system's power budget, with much of this power used in circuits that reduce various types of noise, particularly in the analog front end. The Single-Chip Micro Mote, or SCuM, uses a crystal-free radio architecture and makes design trade-offs that favor power consumption over noise performance while maintaining standards compatibility with popular Internet-of-Things (IoT) protocols such as IEEE 802.15.4 and Bluetooth Low Energy. In the continued development of SCuM, we recognize that the digital baseband hardware developed can be more closely optimized with the architecture of the chip. In this paper, we present an extensible Python-based RTL generator that is closely linked to simulation and testing environments. This approach provides flexibility for use on different hardware platforms, such as tape-outs and FPGA implementations, and has promise in AI-assisted design workflows.

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arXiv2026

A Digital Twin Platform Enabling Monolithic Crystal-Free Bluetooth Low Energy Single-Chip Sensor Motes

Low-power wireless-capable systems-on-chips (SoCs) are critical for researching many of our current environmental issues. The scale at which these devices are needed for many applications necessitates innovation in their design to reduce the various capital and labor costs involved with operating an extensive sensor network. This can be difficult for devices with novel wireless architectures, as many emerging architectures lack commercially available development platforms. This makes pre-silicon validation challenging, and the impact of a failed tapeout is unacceptable when the cost is of primary concern for these devices. In this work, we propose a digital twin ecosystem for Bluetooth Low-Energy (BLE) with physical-layer (PHY) control intended for novel device development and demonstrated through use with crystal-free single-chip sensor motes. We present this system operating with multiple RF front ends and digital baseband implementations, including a commercially available Software Defined Radio (SDR) with synthesized RTL and embedded firmware, along with an existing crystal-free SoC front end and FPGA digital baseband. These configurations are shown to be capable of communicating sensor data with commercially available BLE devices and achieving receiver sensitivities up to -82 dBm, exceeding the minimum BLE specification. This approach is extendable to other hardware and communication protocols and promises to enable inexpensive, reusable validation and verification tools for novel wireless devices.

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