arXiv subjects

Bruna Cardoso Paz

Publications and source records attributed to Bruna Cardoso Paz.

6 recordsLinked to original sources

arXiv2026

Highly uniform first-electron position in qubit arrays fabricated on dedicated QSOI(R) 300mm commercial platform

We report progress toward the development of a quantum silicon-on-insulator (QSOI(R)) technology compatible with 300mm CMOS fabrication and adapted from the 28nm Fully-Depleted SOI (28nm FD-SOI) platform for scalable quantum computing. We compare quantum devices fabricated with standard 28nm FD-SOI and QSOI(R) technologies, and show striking improvements of room temperature electrostatic properties of the individual device. Moreover, the QSOI(R) technology has significantly reduced the device variability and the dispersion of device properties at the wafer level. Transistor metrics are reproduced by TCAD simulations showing that the electrostatics of the devices behave as expected for QSOI(R) technology. Wafer-scale measurements at sub-2K show reproducible quantum dots down to the few-electron regime with 69\% yield for successful charge detection of the first electron and a dispersion of the first electron position of $\mathrm{\pm 35 mV}$ over 377 quantum dots. These results establish QSOI(R) as a promising platform for CMOS-compatible quantum device co-integration.

cond-mat.mes-hall↗

arXiv2026

Multiplexed cryo-CMOS control of an isolated double quantum dot

Scalable spin-based quantum computing demands precise and stable control of a large number of gate-defined quantum dots while minimizing wiring complexity and thermal load. Control architectures based on sample-and-hold (SH) multiplexing techniques offer a promising solution by enabling sequential programming of several gate voltages using a limited number of input lines. However, the compatibility of such dynamic voltage refreshing with the stringent stability, noise, and speed requirements of quantum dot operation is an active subject of study. Here we experimentally demonstrate that a multiplexing cryo-CMOS circuit can reliably bias a silicon double quantum dot (DQD) at 0.5K. Exploiting the isolated regime, we show deterministic loading and isolation of four electrons and stable access to all five charge configurations from (4,0) to (0,4), despite the sequential voltage refreshing. We further demonstrate rapid voltage pulsing across an inter-dot transition, resolving single-electron tunneling events and stochastic switching at the (1,3)-(0,4) transition. These results confirm that SH-based multiplexed control is compatible with both static biasing and pulsing of isolated quantum dots, representing an important milestone toward scalable cryogenic control architectures for large-scale spin-qubit processors.

cond-mat.mes-hall↗

arXiv2025

Transport characterization and quantum dot coupling in commercial 22FDX

Different groups worldwide have been working with the GlobalFoundries 22nm platform (22FDX) with the hopes of industrializing the fabrication of Si spin qubits. To guide this effort, we have performed a systematic study of six of the foundry's processes of reference (POR). Using effective mobility as a figure of merit, we study the impact of gate stack, channel type and back bias as a function of temperature. This screening process selected qubit devices that allowed us to couple quantum dots along both the length and width of the Si channel. We present stability diagrams with clear and regular honeycomb patterns, where spurious elements such as dopants are not observed. By combining these results with room and low temperature simulations, we provide insights into potential technology optimizations and show both the utility of qubit pre-screening protocols as well as the advantages of leveraging forward body bias within an FDSOI (Fully Depleted Silicon-On-Insulator) qubit platform.

cond-mat.mes-hall↗

arXiv2024

Combining multiplexed gate-based readout and isolated CMOS quantum dot arrays

Semiconductor quantum dot arrays are a promising platform to perform spin-based error-corrected quantum computation with large numbers of qubits. However, due to the diverging number of possible charge configurations combined with the limited sensitivity of large-footprint charge sensors, achieving single-spin occupancy in each dot in a growing quantum dot array is exceedingly complex. Therefore, to scale-up a spin-based architecture we must change how individual charges are readout and controlled. Here, we demonstrate single-spin occupancy of each dot in a foundry-fabricated array by combining two methods. 1/ Loading a finite number of electrons into the quantum dot array; simplifying electrostatic tuning by isolating the array from the reservoirs. 2/ Deploying multiplex gate-based reflectometry to dispersively probe charge tunneling and spin states without charge sensors or reservoirs. Our isolated arrays probed by embedded multiplex readout can be readily electrostatically tuned. They are thus a viable, scalable approach for spin-based quantum architectures.

cond-mat.mes-hall↗

arXiv2023

Electrical manipulation of a single electron spin in CMOS with micromagnet and spin-valley coupling

For semiconductor spin qubits, complementary-metal-oxide-semiconductor (CMOS) technology is the ideal candidate for reliable and scalable fabrication. Making the direct leap from academic fabrication to qubits fabricated fully by industrial CMOS standards is difficult without intermediate solutions. With a flexible back-end-of-line (BEOL) new functionalities such as micromagnets or superconducting circuits can be added in a post-CMOS process to study the physics of these devices or achieve proof of concepts. Once the process is established it can be incorporated in the foundry-compatible process flow. Here, we study a single electron spin qubit in a CMOS device with a micromagnet integrated in the flexible BEOL. We exploit the synthetic spin orbit coupling (SOC) to control the qubit via electric field and we investigate the spin-valley physics in the presence of SOC where we show an enhancement of the Rabi frequency at the spin-valley hotspot. Finally, we probe the high frequency noise in the system using dynamical decoupling pulse sequences and demonstrate that charge noise dominates the qubit decoherence in this range.

cond-mat.mes-hall↗

arXiv2021

Spin-valley coupling anisotropy and noise in CMOS quantum dots

One of the main advantages of silicon spin qubits over other solid-state qubits is their inherent scalability and compatibility with the 300 mm CMOS fabrication technology that is already widely used in the semiconductor industry, whilst maintaining high readout and gate fidelities. We demonstrate detection of a single electron spin using energy-selective readout in a CMOS-fabricated nanowire device with an integrated charge detector. We measure a valley splitting of 0.3 meV and 0.16 meV in two similar devices. The anisotropy of the spin-valley mixing is measured and shown to follow the dependence expected from the symmetry of the local confinement, indicating low disorder in the region of the quantum dot. Finally the charge noise in the spin-valley coupling regime is investigated and found to induce fluctuations in the qubit energy in the range of $0.6GHz/\sqrt{Hz}$.

cond-mat.mes-hall↗