arXiv subjects

Carmen G. Almudéver

Publications and source records attributed to Carmen G. Almudéver.

18 recordsLinked to original sources

arXiv2026

Quantum Circuit Pruning: From NISQ Architectures to Fault-Tolerant Operations

We present a routing-aware pruning strategy for quantum circuits that selectively removes parametric two-qubit gates whose computational contribution is outweighed by the fidelity cost of their execution, and assess it across both Noisy Intermediate-Scale Quantum (NISQ) and fault-tolerant quantum computing (FTQC) architectures. Each two-qubit gate of a circuit is evaluated by comparing an architecture-independent lower bound on the fidelity cost of omitting the gate against a hardware-specific model for the routing execution cost in each setting. We additionally provide an analytical characterization of the pruning boundary as a function of rotation angle, qubit distance, and hardware noise. Simulations on benchmark circuits demonstrate gate count reductions of up to 48.6% and fidelity improvements of up to 47.7% in the NISQ regime, while a feasibility analysis on FT hardware indicates that pruning is expected to remain relevant across a range of code distances and physical error rates. These results establish routing-aware pruning as a practical and unified compilation strategy across the quantum computing stack.

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arXiv2026

Weighted Quantum Signal Processing: Low-Depth Polynomial Approximation with Applications to Kolmogorov-Arnold Networks

Quantum Signal Processing is a powerful quantum framework for generating and approximating univariate polynomials. However, QSP is often limited by circuit-depth bottlenecks and parity constraints on the class of realizable polynomials. In this work, we introduce Weighted Quantum Signal Processing, an extension of QSP in which a weight function is assigned to the central rotation operator. This formulation provides a deeper understanding of QSP, which emerges as the special case of WQSP with unit weights. The choice of weights determines the structure and expressive capabilities of WQSP circuits. When the weights are natural numbers greater than one, WQSP reduces to a pruned version of QSP, revealing parameter redundancies in the standard framework. Through appropriate selection of integer weights, WQSP achieves linear-to-exponential reductions in the number of parameters required to realize arbitrary bounded univariate polynomials while preserving approximation quality. For generic weights, we establish corresponding approximation error bounds and show that, in many cases, the approximation is exact. We analyze WQSP from both a deterministic perspective, where polynomial generation is formulated as the solution of a linear system, and a quantum machine learning perspective, where WQSP serves as a structured and expressive quantum learning model. We further employ this learning framework to parameterize learnable activation functions in Kolmogorov--Arnold Networks for multivariate function approximation. Our results show that WQSP provides a compact, flexible, and theoretically grounded framework for realizing arbitrary univariate polynomials while requiring significantly fewer trainable parameters than conventional QSP. This yields expressive and parameter-efficient neural architectures, highlighting the potential of WQSP as a scalable primitive for quantum-enhanced machine learning.

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arXiv2026

Transversal Gates and Magic State Distillation in an Optimally Synthesized Spin-Qubit Shuttling Bus

Fault-tolerant quantum computing requires not only reliable logical qubit storage, but also the ability to perform high-fidelity logical operations between error-corrected qubits at scale. While much of the existing literature focuses on optimizing syndrome extraction for a single logical qubit, the co-design of physical architectures that support both robust error correction and efficient logical computation remains an open challenge. In this work, we propose a multi-qubit spin-qubit shuttling bus architecture that addresses both requirements simultaneously. The architecture optimizes the physical qubit layout for syndrome extraction and supports transversal two-qubit logical gates between an arbitrary number of logical qubits, achieving all-to-all logical connectivity through coherent spin shuttling. We further propose an ancilla-sharing scheme that encodes multiple logical qubits within a single logical element, compressing the physical footprint of the processor and improving long-range gate fidelity. Extending the architecture from a one-dimensional bus to a two-dimensional grid of shuttling tracks reduces the inter-qubit distance, yielding consistent improvements in logical error. Finally, we apply the Quantum Reverse Mapping methodology at the logical level to optimize the layout of a \textit{15-to-1} magic state distillation circuit, demonstrating how the transversal capabilities of the proposed architecture can be leveraged for universal fault-tolerant computation. Taken together, these results establish a principled co-design framework that bridges the physical, error-correction, and logical computation layers of the quantum stack, and demonstrate that spin-qubit shuttling architectures are a viable and flexible substrate for scalable fault-tolerant quantum computation.

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arXiv2026

Energy efficiency of quantum computers

How much energy does a quantum computer consume? Are they more efficient than their classical counterparts? In this work, we make a step towards answering these questions. We define the energy efficiency of a quantum computer as the ratio of the number of algorithms it can perform during a given time over the energy consumed by the hardware during this time. We analyze the most representative physical platforms currently envisioned to be used as building blocks of quantum computers: superconducting qubits, silicon spin qubits, trapped ions, neutral atoms and photonic qubits. Including insights from experts in all these technologies and taking into account algorithm compilation constraints, we discuss the advantages and inconveniences of each platform from an energy standpoint. Beyond providing concrete values of the energy consumption of current quantum computers, we lay the foundation of a framework to benchmark the energy efficiency of any future quantum computing architecture.

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arXiv2026

Emergence of a Macroscopic Cat State and Multi-Channel Entanglement in a Frustrated Cluster Spin Chain

We study a one-dimensional frustrated spin chain, which combines cluster-Ising and anisotropic next-nearest neighbor Ising models. We first offer a historical perspective that justifies the studied model. Then we study in detail the two quantum phases and prove that they are separated by a first order quantum phase transition. On one side, the ground state corresponds to a ferromagnetic phase, shows the presence of macroscopic cat states, and a small gap that closes in the thermodynamic limit. On the other phase, competing interactions avoid the establishment of a topological phase, though it conserves large incommensurate quantum correlations. We prove it is fundamentally distinct from a simple paramagnet, and we name it an incommensurate phase. This is a gapped phase, which gap does not close in the thermodynamic limit. While in the ferromagnetic phase there are two dominant Schmidt coefficients, in the incommensurate phase there are four. This corresponds to four distinct bipartite entanglement channels contributing substantially to the ground state. Finally, we discuss the utility of the macroscopic cat states for quantum metrology applications and the experimental feasibility of the system.

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arXiv2026

Adaptive time Compressed QITE (ACQ) and its geometrical interpretation

Imaginary time evolution (ITE) is a well-established method for ground-state preparation, a fundamental problem in many fields such as materials science, chemistry, and optimization. Quantum ITE (QITE) approximates this evolution on quantum hardware but suffers from high circuit depth and numerous measurements. In this work we introduce adaptive-time compressed QITE (ACQ), a novel algorithm that reduces resource-cost by combining adaptive time steps with circuit compression. This approach leverages geometric insights by characterizing its relationship to geodesic trajectories with a measure that distinguishes trajectories in CPN. Recalling that ITE is a gradient flow on the complex projective plane $\mathbb{CP}^N$, such trajectory measures allow one to measure the deviation from geodesicity of said flow. For Hamiltonians with only two distinct eigenvalues (spectral cardiality), ITE and QITE exactly trace geodesics, this fact motivates an adaptive strategy for systems whose corresponding spectral cardinality is greater than 2, where QITE unitaries are reused until an energy increase signals departure from the ITE path. This is implemented via a line search for energy minimization. Circuit compression is achieved by approximating the sequence of QITE unitaries with a single element of a one-parameter group. Numerical simulations on the transverse field Ising model and the Heisenberg model demonstrate that ACQ achieves comparable fidelity to standard QITE while significantly reducing the number of QITE optimizations and maintaining fixed circuit depth during propagation. Gate-count estimates and an analysis of the fidelity scaling with truncation parameters are provided. A gate count and performance comparison with the state of the art method double bracket QITE is also performed.

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arXiv2026

Synthesizing an Optimal Spin Qubit Shuttling Bus Architecture for the Surface Code

As quantum computers scale toward millions of physical qubits, it becomes essential to robustly encode individual logical qubits to ensure fault tolerance under realistic noise. A high-quality foundational encoding allows future compilation techniques and heuristics to build on optimal or near-optimal layouts, improving scalability and error resilience. In this work, we synthesize a one-dimensional shuttling bus architecture for the rotated surface code, leveraging coherent spin-qubit shuttling, following a novel methodology we name Quantum Reverse Mapping. We formulate a mixed-integer optimization model that yields optimal solutions with relatively low execution time for small code distances, and propose a scalable heuristic that matches optimal results while maintaining linear computational complexity. We evaluate the synthesized architecture using architectural metrics, such as shuttling distance and cycle time, and full quantum simulations under realistic noise models, showing that the proposed design can sustain logical error rates as low as $2\times 10^{-10}$ per round at code distance 21, showcasing its feasibility for scalable quantum error correction in spin-based quantum processors.

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arXiv2026

Quantum Circuit Pruning: Improving Fidelity via Compilation-Aware Circuit Approximation

This work presents a routing-aware pruning strategy for quantum circuits executed on Noisy Intermediate-Scale Quantum (NISQ) devices. We propose a method to remove parametric controlled rotations whose small rotation angles do not justify the routing overhead required for their implementation. By selectively pruning such gates, the method mitigates fidelity loss arising from additional SWAP operations introduced during compilation. Our approach evaluates whether executing a gate leads to greater fidelity loss than omitting it. Simulations on benchmark circuits with realistic noise models show that the method reduces two-qubit gate counts (up to 48.6%) while improving final state fidelity (up to 47.7%), especially for larger circuits where routing costs dominate.

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arXiv2025

Assessing the Role of Communication in Modular Multi-Core Quantum Systems

The scalability of quantum computing is constrained by the physical and architectural limitations of monolithic quantum processors. Modular multi-core quantum architectures, which interconnect multiple quantum cores (QCs) via classical and quantum-coherent links, offer a promising alternative to address these challenges. However, transitioning to a modular architecture introduces communication overhead, where classical communication plays a crucial role in executing quantum algorithms by transmitting measurement outcomes and synchronizing operations across QCs. Understanding the impact of classical communication on execution time is therefore essential for optimizing system performance. In this work, we introduce \qcomm, an open-source simulator designed to evaluate the role of classical communication in modular quantum computing architectures. \qcomm{} provides a high-level execution and timing model that captures the interplay between quantum gate execution, entanglement distribution, teleportation protocols, and classical communication latency. We conduct an extensive experimental analysis to quantify the impact of classical communication bandwidth, interconnect types, and quantum circuit mapping strategies on overall execution time. Furthermore, we assess classical communication overhead when executing real quantum benchmarks mapped onto a cryogenically-controlled multi-core quantum system. Our results show that, while classical communication is generally not the dominant contributor to execution time, its impact becomes increasingly relevant in optimized scenarios -- such as improved quantum technology, large-scale interconnects, or communication-aware circuit mappings. These findings provide useful insights for the design of scalable modular quantum architectures and highlight the importance of evaluating classical communication as a performance-limiting factor in future systems.

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arXiv2025

Accurate and Scalable Simulation of Cavity-Based Networks in Modular Quantum Architectures

Cavity-mediated interconnects are a promising platform for scaling modular quantum computers by enabling high-fidelity inter-chip quantum state transmission and entanglement generation. In this work, we first model the dynamics of deterministic inter-chip quantum state transfer using the Stimulated Raman Adiabatic Passage (STIRAP) protocol, analyzing fidelity loss mechanisms under experimentally achievable qubit-cavity coupling and decoherence parameters. We then extend the NetSquid simulator, typically used for simulating long-range quantum communication networks, to support cavity-based communication channels for mediating inter-chip state transfer and entanglement generation. We model cavities as amplitude damping channels parameterized by physical system characteristics; cavity decay rate k and qubit-cavity coupling strength g, and analyze the impact of intrinsic qubit decoherence factors dictated by T1 and T2 times. Our simulations accurately represent the system's dynamics in both strong and weak coupling regimes, and identify critical trade-offs between fidelity, latency, and noise factors. The proposed framework supports faithful modeling and scalable simulation of modular architectures, and provides insights into design optimization for practical quantum network implementations.

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arXiv2025

On the Impact of Classical and Quantum Communication Networks Upon Modular Quantum Computing Architecture System Performance

Modular architectures are a promising approach to scaling quantum computers beyond the limits of monolithic designs. However, non-local communications between different quantum processors might significantly impact overall system performance. In this work, we investigate the role of the network infrastructure in modular quantum computing architectures, focusing on coherence loss due to communication constraints. We analyze the impact of classical network latency on quantum teleportation and identify conditions under which it becomes a bottleneck. Additionally, we study different network topologies and assess how communication resources affect the number and parallelization of inter-core communications. Finally, we conduct a full-stack evaluation of the architecture under varying communication parameters, demonstrating how these factors influence the overall system performance. The results show that classical communication does not become a bottleneck for systems exceeding one million qubits, given current technology assumptions, even with modest clock frequencies and parallel wired interconnects. Additionally, increasing quantum communication resources generally shortens execution time, although it may introduce additional communication overhead. The optimal number of quantum links between QCores depends on both the algorithm being executed and the chosen inter-core topology. Our findings offer valuable guidance for designing modular architectures, enabling scalable quantum computing.

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arXiv2025

Modeling Quantum Links for the Exploration of Distributed Quantum Computing Systems

Quantum computing offers the potential to solve certain complex problems, yet, scaling monolithic processors remains a major challenge. Modular and distributed architectures are proposed to build large-scale quantum systems while bringing the security advantages of quantum communication. At present, this requires accurate and computationally efficient models of quantum links across different scales to advance system design and guide experimental prototyping. In this work, we review protocols and models for estimating latency, losses, and fidelity in quantum communication primitives relying on quantum state distribution via microwave photons. We also propose a scalable simulation framework to support the design and evaluation of future distributed quantum computing systems.

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arXiv2025

An Accurate and Efficient Analytic Model of Fidelity Under Depolarizing Noise Oriented to Large Scale Quantum System Design

Fidelity is one of the most valuable and commonly used metrics for assessing the performance of quantum circuits on error-prone quantum processors. Several approaches have been proposed to estimate circuit fidelity without executing it on quantum hardware, but they often face limitations in scalability or accuracy. In this work, we present a comprehensive theoretical framework to predict the fidelity of quantum circuits under depolarizing noise. Building on theoretical results, we propose an efficient fidelity estimation algorithm based on device calibration data. The method is thoroughly validated through simulation and execution on real hardware, demonstrating improved accuracy compared to state-of-the-art alternatives, with enhancements in prediction $R^2$ ranging from 4.96\% to 213.54\%.. The proposed approach provides a scalable and practical tool for benchmarking quantum hardware, comparing quantum software techniques such as compilation methods, obtaining computation bounds for quantum systems, and guiding hardware design decisions, making it a critical resource for developing and evaluating quantum computing technologies.

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arXiv2025

Compilation Techniques for Spin Qubits in a Shuttling Bus Architecture

In this work, we explore and propose several quantum circuit mapping strategies to optimize qubit shuttling in scalable quantum computing architectures based on silicon spin qubits. Our goal is to minimize phase errors introduced during shuttling operations while reducing the overall execution time of quantum circuits. We propose and evaluate five mapping algorithms using benchmarks from quantum algorithms. The Swap Return strategy emerged as the most robust solution, offering a superior balance between execution time and error minimization by considering future qubit interactions. Additionally, we assess the importance of initial qubit placement, demonstrating that an informed placement strategy can significantly enhance the performance of dynamic mapping approaches.

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arXiv2024

Characterizing the Inter-Core Qubit Traffic in Large-Scale Quantum Modular Architectures

Modular quantum processor architectures are envisioned as a promising solution for the scalability of quantum computing systems beyond the Noisy Intermediate Scale Quantum (NISQ) devices era. Based upon interconnecting tens to hundreds of quantum cores via a quantum intranet, this approach unravels the pressing limitations of densely qubit-packed monolithic processors, mainly by mitigating the requirements of qubit control and enhancing qubit isolation, and therefore enables executing large-scale algorithms on quantum computers. In order to optimize such architectures, it is crucial to analyze the quantum state transfers occurring via inter-core communication networks, referred to as inter-core qubit traffic. This would also provide insights to improve the software and hardware stack for multi-core quantum computers. To this aim, we present a pioneering characterization of the spatio-temporal inter-core qubit traffic in large-scale circuits. The programs are executed on an all-to-all connected multi-core architecture that supports up to around 1000 qubits. We characterize the qubit traffic based on multiple performance metrics to assess the computational process and the communication overhead. Based on the showcased results, we conclude on the scalability of the presented algorithms, provide a set of guidelines to improve mapping quantum circuits to multi-core processors, and lay the foundations of benchmarking large-scale multi-core architectures.

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arXiv2024

Route-Forcing: Scalable Quantum Circuit Mapping for Scalable Quantum Computing Architectures

Quantum computers are expected to scale in size to close the gap that currently exists between quantum algorithms and quantum hardware. To this end, quantum compilation techniques must scale along with the hardware constraints, shifting the current paradigm of obtaining an optimal compilation to relying on heuristics that allow for a fast solution, even though the quality of such a solution may not be optimal. Significant concerns arise as the execution time of current mapping techniques experiences a notable increase when applied to quantum computers with a high number of qubits. In this work, we present Route-Forcing, a quantum circuit mapping algorithm that shows an average speedup of $3.7\times$ compared to the state-of-the-art scalable techniques, reducing the depth of the mapped circuit by $4.7 \times$ at the expense of adding $1.3 \times$ more SWAP gates. Moreover, the proposed mapping algorithm is adapted and tuned for what is expected to be the next generation of quantum computers, in which different processors are interconnected to increase the total number of qubits, allowing for more complex computations.

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arXiv2024

Reducing the number of qubits in quantum simulations of one dimensional many-body Hamiltonians

We investigate the Ising and Heisenberg models using the Block Renormalization Group Method (BRGM), focusing on its behavior across different system sizes. The BRGM reduces the number of spins by a factor of 1/2 (1/3) for the Ising (Heisenberg) model, effectively preserving essential physical features of the model while using only a fraction of the spins. Through a comparative analysis, we demonstrate that as the system size increases, there is an exponential convergence between results obtained from the original and renormalized Ising Hamiltonians, provided the coupling constants are redefined accordingly. Remarkably, for a spin chain with 24 spins, all physical features, including magnetization, correlation function, and entanglement entropy, exhibit an exact correspondence with the results from the original Hamiltonian. The study of the Heisenberg model also shows this tendency, although complete convergence may appear for a size much larger than 24 spins, and is therefore beyond our computational capabilities. The success of BRGM in accurately characterizing the Ising model, even with a relatively small number of spins, underscores its robustness and utility in studying complex physical systems, and facilitates its simulation on current NISQ computers, where the available number of qubits is largely constrained.

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arXiv2024

Revisiting the Mapping of Quantum Circuits: Entering the Multi-Core Era

Quantum computing represents a paradigm shift in computation, offering the potential to solve complex problems intractable for classical computers. Although current quantum processors already consist of a few hundred of qubits, their scalability remains a significant challenge. Modular quantum computing architectures have emerged as a promising approach to scale up quantum computing systems. This paper delves into the critical aspects of distributed multi-core quantum computing, focusing on quantum circuit mapping, a fundamental task to successfully execute quantum algorithms across cores while minimizing inter-core communications. We derive the theoretical bounds on the number of non-local communications needed for random quantum circuits and introduce the Hungarian Qubit Assignment (HQA) algorithm, a multi-core mapping algorithm designed to optimize qubit assignments to cores with the aim of reducing inter-core communications. Our exhaustive evaluation of HQA against state-of-the-art circuit mapping algorithms for modular architectures reveals a $4.9\times$ and $1.6\times$ improvement in terms of execution time and non-local communications, respectively, compared to the best performing algorithm. HQA emerges as a very promising scalable approach for mapping quantum circuits into multi-core architectures, positioning it as a valuable tool for harnessing the potential of quantum computing at scale.

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