SearcharxivSearch

arXiv subjects

Chien-Ting Tung

Publications and source records attributed to Chien-Ting Tung.

4 recordsLinked to original sources

Compact Modeling of Oxide-Semiconductor, 2D Material, Carbon Nanotube, and Cryogenic Transistors with Experiment Verification

This paper presents a unified compact model for emerging transistor technologies, including oxide-semiconductor field-effect transistors (OSFETs), 2D material FETs (2DFETs), carbon nanotube FETs (CNFETs), and cryogenic MOSFETs. A unified charge-density formulation is developed to account for quantum confinement, trap charges, and band-tail states in channel charge calculations. A physics-based transport model is introduced to seamlessly capture carrier transport from the long-channel diffusive regime to the short-channel ballistic limit. Scaling models are incorporated to accurately describe 2D electrostatic effects. Cryogenic operation is modeled through the inclusion of band-tail states and temperature-dependent mobility and threshold voltage. The proposed model is validated against experimental data from the fabricated OSFETs with multiple channel lengths and published measurements of 2DFETs, CNFETs, and cryogenic MOSFETs. Excellent agreement is demonstrated across diverse device architectures, operating conditions, and material systems.

physics.app-ph

A Symmetric Unified Transport and Charge Model for Metal-Oxide-Semiconductor Field-Effect Transistor from Diffusive to Ballistic Regimes

This paper presents a symmetric unified transport (UT) compact model for metal-oxide-semiconductor field-effect transistors (MOSFETs) that bridges drift-diffusion (DD) and ballistic transport (BT) regimes. The proposed model self consistently accounts for both current and charge across the DD-BT transition. Quantum capacitance and carrier transport are incorporated into the charge density formulation. Drain side velocity saturation and the source side thermal velocity limit are unified within a single framework using a physically motivated high field scattering length, enabling accurate modeling from DD square law behavior to the ballistic limit. In addition, a physical channel charge and capacitance model is developed to capture capacitance reduction in the quasi-ballistic regime, which is not considered in standard compact models. The model is verified using theoretical analysis and experimental data from MOSFETs with multiple channel lengths, achieving accurate fitting using only physically motivated model parameters. The formulation is continuous and symmetric, and it passes both DC and AC symmetry tests.

cond-mat.mes-hall

Physics-Informed Neural Networks for Device and Circuit Modeling: A Case Study of NeuroSPICE

We present NeuroSPICE, a physics-informed neural network (PINN) framework for device and circuit simulation. Unlike conventional SPICE, which relies on time-discretized numerical solvers, NeuroSPICE leverages PINNs to solve circuit differential-algebraic equations (DAEs) by minimizing the residual of the equations through backpropagation. It models device and circuit waveforms using analytical equations in time domain with exact temporal derivatives. While PINNs do not outperform SPICE in speed or accuracy during training, they offer unique advantages such as surrogate models for design optimization and inverse problems. NeuroSPICE's flexibility enables the simulation of emerging devices, including highly nonlinear systems such as ferroelectric memories.

cs.AI

SEMIDV: A Compact Semiconductor Device Simulator with Quantum Effects

In this paper, I present SEMIDV - a compact semiconductor device simulator incorporating quantum effects. SEMIDV solves the Poisson-Drift-Diffusion equations for semiconductor devices and provides a user-friendly Python interface for scripting and data analysis. Localization landscape theory is introduced to provide quantum corrections to the Drift-Diffusion equation. This theory directly solves the ground state of the Schrodinger equation without further approximation, offering an efficient solution for quantum effect modeling. Additionally, a compact mobility model considering ballistic transport is developed to capture the ballistic length dependence of mobility and the velocity overshoot effect in short-channel devices. Finally, a study on a nanosheet FET using SEMIDV is conducted. I analyze the electrical characteristics of a state-of-the-art GAA/RibbonFET with a 6 nm gate length and discuss the effects of velocity overshoot and quantum confinement on currents and capacitances. A design for an ultra-short-channel transistor with a gate length down to 4.5 nm with a Vdd = 0.45 V is proposed to push the boundaries of integrated circuit technology further.

cond-mat.mes-hall