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Ching-Tzu Chen

Publications and source records attributed to Ching-Tzu Chen.

12 recordsLinked to original sources

Accelerated Discovery of Topological Conductors for Nanoscale Interconnects

The sharp increase in resistivity of copper interconnects at ultra-scaled dimensions threatens the continued miniaturization of integrated circuits. Topological semimetals (TSMs) with gapless surface states (Fermi arcs) provide conduction channels resistant to localization. Here we develop an efficient computational framework to quantify 0K surface-state transmission in nanowires derived from Wannier tight-binding models of topological conductors that faithfully reproduce relativistic density functional theory results. Sparse matrix techniques enable scalable simulations incorporating disorder and surface roughness, allowing systematic materials screening across sizes, chemical potentials, and transport directions. A dataset of 3000 surface transmission values reveals TiS, ZrB$_{2}$, and nitrides AN where A=(Mo, Ta, W) as candidates with conductance matching or exceeding copper and benchmark TSMs NbAs and NbP. This dataset further supports machine learning models for rapid interconnect compound identification. Our results highlight the promise of topological conductors in overcoming copper's scaling limits and provide a roadmap for data-driven discovery of next-generation interconnects.

cond-mat.mes-hall

Surface-dominant transport in Weyl semimetal NbAs nanowires for next-generation interconnects

Ongoing demands for smaller and more energy efficient electronic devices necessitate alternative interconnect materials with lower electrical resistivity at reduced dimensions. Despite the emergence of many promising candidates, synthesizing high quality nanostructures remains a major bottleneck in evaluating their performance. Here, we report the successful synthesis of Weyl semimetal NbAs nanowires via thermomechanical nanomolding, achieving single crystallinity and controlled diameters as small as 40 nm. Our NbAs nanowires exhibit a remarkably low room-temperature resistivity of 9.7 +/- 1.6 microOhm-cm, which is three to four times lower than their bulk counterpart. Theoretical calculations corroborate the experimental observations, attributing this exceptional resistivity reduction to surface dominant conduction with long carrier lifetime at finite temperatures. Further characterization of NbAs nanowires and bulk single crystals reveals high breakdown current density, robust stability, and superior thermal conductivity. Collectively, these properties highlight the strong potential of NbAs nanowires as next-generation interconnects, which can surpass the limitations of current copper-based interconnects. Technologically, our findings present a practical application of topological materials, while scientifically showcasing the fundamental properties uniquely accessible in nanoscale platforms.

cond-mat.mes-hall

Surface conduction and reduced electrical resistivity in ultrathin noncrystalline NbP semimetal

The electrical resistivity of conventional metals, such as copper, is known to increase in thin films due to electron-surface scattering, limiting the performance of metals in nanoscale electronics. Here, we find an unusual reduction of resistivity with decreasing film thickness in niobium phosphide (NbP) semimetal deposited at relatively low temperatures of 400 \deg C. In films thinner than 5 nm, the room temperature resistivity (~34 microohm*cm for 1.5-nm-thick NbP) was up to six times lower than the bulk NbP resistivity, and lower than conventional metals at similar thickness (typically ~100 microohm*cm). Remarkably, the NbP films are not crystalline, but display local nanocrystalline, short-range order within an amorphous matrix. Our analysis suggests that the lower effective resistivity is due to conduction via surface channels, together with high surface carrier density and sufficiently good mobility as the film thickness is reduced. These results and the fundamental insights obtained here could enable ultrathin, low-resistivity wires for nanoelectronics, beyond the limitations of conventional metals.

cond-mat.mtrl-sci

Surface-dominated conductance scaling in Weyl semimetal NbAs

Protected surface states arising from non-trivial bandstructure topology in semimetals can potentially enable new device functionalities in compute, memory, interconnect, sensing, and communication. This necessitates a fundamental understanding of surface-state transport in nanoscale topological semimetals. Here, we investigate quantum transport in a prototypical topological semimetal NbAs to evaluate the potential of this class of materials for beyond-Cu interconnects in highly-scaled integrated circuits. Using density functional theory (DFT) coupled with non-equilibrium Green's function (NEGF) calculations, we show that the resistance-area RA product in NbAs films decreases with decreasing thickness at the nanometer scale, in contrast to a nearly constant RA product in ideal Cu films. This anomalous scaling originates from the disproportionately large number of surface conduction states which dominate the ballistic conductance by up to 70% in NbAs thin films. We also show that this favorable RA scaling persists even in the presence of surface defects, in contrast to RA sharply increasing with reducing thickness for films of conventional metals, such as Cu, in the presence of surface defects. These results underscore the promise of topological semimetals like NbAs as future back-end-of-line (BEOL) interconnect metals.

cond-mat.mes-hall

Unconventional Resistivity Scaling in Topological Semimetal CoSi

Nontrivial band topologies in semimetals lead to robust surface states that can contribute dominantly to the total conduction. This may result in reduced resistivity with decreasing feature size contrary to conventional metals, which may highly impact the semiconductor industry. Here we study the resistivity scaling of a representative topological semimetal CoSi using realistic band structures and Green's function methods. We show that there exists a critical thickness d_c dividing different scaling trends. Above d_c, when the defect density is low such that surface conduction dominates, resistivity reduces with decreasing thickness; when the defect density is high such that bulk conduction dominates, resistivity increases in as conventional metals. Below d_c, the persistent remnants of the surface states give rise to decreasing resistivity down to the ultrathin limit, unlike in topological insulators. The observed CoSi scaling can apply to broad classes of topological semimetals, providing guidelines for materials screening and engineering. Our study shows that topological semimetals bear the potential of overcoming the resistivity scaling challenges in back-end-of-line interconnect applications.

cond-mat.mes-hall

Size-Dependent Grain Boundary Scattering in Topological Semimetals

We assess the viability of topological semimetals for application in advanced interconnect technology, where conductor size is on the order of a few nanometers and grain boundaries are expected to be prevalent. We investigate the electron transport properties and grain boundary scattering in thin films of the topological semimetals CoSi and CoGe using first-principles calculations combined with the Non-Equilibrium Green's Function (NEGF) technique. Unlike conventional interconnect metals like Cu and Al, we find that CoSi and CoGe conduct primarily through topologically-protected surface states in thin film structures even in the presence of grain boundaries. The area-normalized resistance decreases with decreasing film thickness for CoSi and CoGe thin films both with and without grain boundaries; a trend opposite to that of the conventional metals Cu and Al. The surface-dominated transport mechanisms in thin films of topological semimetals with grain boundaries demonstrates a fundamentally new paradigm of the classical resistivity size-effect, and suggests that these materials may be promising candidates for applications as nano-interconnects where high electrical resistivity acts as a major bottleneck limiting semiconductor device performance.

cond-mat.mtrl-sci

Projected mushroom-type phase-change memory

Phase-change memory devices have found applications in in-memory computing where the physical attributes of these devices are exploited to compute in place without the need to shuttle data between memory and processing units. However, non-idealities such as temporal variations in the electrical resistance have a detrimental impact on the achievable computational precision. To address this, a promising approach is projecting the phase configuration of phase change material onto some stable element within the device. Here we investigate the projection mechanism in a prominent phase-change memory device architecture, namely mushroom-type phase-change memory. Using nanoscale projected Ge2Sb2Te5 devices we study the key attributes of state-dependent resistance, drift coefficients, and phase configurations, and using them reveal how these devices fundamentally work.

physics.app-ph

Topological Semimetals for Scaled Back-End-Of-Line Interconnect Beyond Cu

The resistance bottleneck in metal-interconnect scaling calls for new interconnect materials. This paper explores topological semimetals as a potential solution. After reviewing the desirable properties of topological semimetals for back-end-of-line (BEOL) interconnects, we use CoSi as an example to demonstrate the decreasing resistance-area product with scaling and provide material-search guidelines.

cond-mat.mes-hall

Strong interfacial exchange field in the graphene/EuS heterostructure

Exploiting 2D materials for spintronic applications can potentially realize next-generation devices featuring low-power consumption and quantum operation capability. The magnetic exchange field (MEF) induced by an adjacent magnetic insulator enables efficient control of local spin generation and spin modulation in 2D devices without compromising the delicate material structures. Using graphene as a prototypical 2D system, we demonstrate that its coupling to the model magnetic insulator (EuS) produces a substantial MEF (> 14 T) with potential to reach hundreds of Tesla, which leads to orders-of-magnitude enhancement in the spin signal originated from Zeeman spin-Hall effect. Furthermore, the new ferromagnetic ground state of Dirac electrons resulting from the strong MEF may give rise to quantized spin-polarized edge transport. The MEF effect shown in our graphene/EuS devices therefore provides a key functionality for future spin logic and memory devices based on emerging 2D materials in classical and quantum information processing.

cond-mat.mes-hall

Spin-Polarized Tunneling Study on Spin-Momentum Locking in the Topological Insulators

We demonstrate that the charge-spin conversion efficiency of topological insulators (TI) can be experimentally determined by injecting spin-polarized tunneling electrons into a TI. Through a comparative study between bismuth selenide and bismuth antimony telluride, we verified the topological-surface-state origin of the observed giant spin signals. By injecting energetic electrons into bismuth selenide, we further studied the energy dependence of the effective spin polarization at the TI surface. The experimentally verified large spin polarization, as well as our calculations, provides new insights into optimizing TI materials for near room-temperature spintronic applications.

cond-mat.mes-hall

Low-Damage High-Throughput Grazing-Angle Sputter Deposition on Graphene

Despite the prevalence of sputter deposition in the microelectronics industry, it has seen very limited applications for graphene electronics. In this letter, we report systematic investigation of the sputtering induced damages in graphene and identify the energetic sputtering gas neutrals as the primary cause of graphene disorder. We further demonstrate a grazing-incidence sputtering configuration that strongly suppresses fast neutral bombardment and retains graphene structure integrity, creating considerably lower damage than electron-beam evaporation. Such sputtering technique yields fully covered, smooth thin dielectric films, highlighting its potential for contact metals, gate oxides, and tunnel barriers fabrication in graphene device applications.

cond-mat.mes-hall

Graphene Side Gate Engineering

Various mesoscopic devices exploit electrostatic side gates for their operation. In this paper, we investigate how voltage-biasing of graphene side gates modulates the electrical transport characteristics of graphene channel. We explore myriads of typical side gated devices such as symmetric dual side gates and asymmetric single side gate biasing, in monolayer and bilayer graphene. The side gates modulate the electrostatic doping in the graphene channel whose effect is reflected in transport measurement. This modulation efficiency is systematically characterized for all our devices and agrees well with the modeling presented.

cond-mat.mes-hall