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Christopher K. Long

Publications and source records attributed to Christopher K. Long.

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Pulse-optimised circuit elements for scalable and noise-resilient quantum chemistry

Useful chemistry calculations on near-term quantum processors are hindered by current algorithmic runtimes. We develop a methodology to significantly reduce these runtimes. Typically, variational quantum eigensolver (VQE) algorithms are implemented as sequences of primitive gates. Our methodology instead relies on gradient-ascent pulse engineering to construct hardware-tailored pulses for the direct implementation of VQEs. As problem sizes increase, it quickly becomes intractable to optimise a pulse that implements an entire VQE ansatz circuit. However, leading VQEs are constructed in a modular fashion. A problem-tailored VQE is assembled from parameterised circuit elements that simulate hopping between two or four electronic spin orbitals. We show that these circuit elements can be implemented more efficiently using hardware-tailored pulses. We numerically demonstrate our methodology on a silicon spin-qubit quantum processor. We find that common circuit elements, known as single- and double-qubit excitations, can be implemented in less than 289 ns and 927 ns, respectively. Compared with conventional gate-based implementations, our pulse-accelerated qubit excitations provide a scalable approach for faster and therefore more noise-robust quantum chemistry simulations by reducing VQE runtimes by up to a factor of 15.3.

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Hardware-Tailored Resource Estimation for Magic-State Distillation on Silicon Spin Qubits

We present a resource analysis for generating high-fidelity logical magic states on silicon spin-qubit platforms. We consider a range of architectures, including a shuttling-based SpinBus design, a dense nearest-neighbor layout, and a hybrid scheme with shuttling-connected patches. We compare surface, color, and biased error-correcting codes, and analyze the $5\to1$ and $15\to1$ magic-state distillation protocols. Our approach combines bottom-up and top-down methodologies. We construct a hardware-level noise model based on a silicon-processor Hamiltonian with realistic parameters and $1/f$ non-Markovian noise, enabling estimation of physical resources required to reach target logical error rates. These results are propagated to system-level overheads for applications including spin dynamics, integer factorization, and quantum chemistry. Conversely, we fix target logical fidelities and derive corresponding constraints on hardware performance. Our framework enables systematic evaluation of resource-reduction strategies. We find that optimized control pulses reduce magic-state distillation overhead by 42\% compared to standard gate implementations. In addition, silicon-tailored biased error-correcting codes achieve an approximately threefold reduction in physical footprint relative to the surface code, even without physical-bias-preserving operations.

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From virtual Z gates to virtual Z pulses

Virtual $Z$ gates have become integral for implementing fast, high-fidelity single-qubit operations. However, virtual $Z$ gates require that the system's two-qubit gates are microwave-activated or normalise the single-qubit $Z$ rotations$\unicode{x2014}$the group generated by $X$, $\operatorname{SWAP}$, and arbitrary phase gates. Herein, we extend the theory of virtual $Z$ gates to the pulse-level, which underlies both gate design and the recent advancements of pulse-level quantum algorithms. These algorithms attempt to utilise the full potential of present-day noisy intermediate-scale quantum (NISQ) devices by removing overheads associated with the compilation and transpilation of gates. To extend the theory of virtual $Z$ gates, we derive a platform-agnostic theoretical framework for virtual $Z$ pulses by employing time dilations of the pulse sequences that control the quantum processor. Additionally, we provide worked examples of the implementation of virtual $Z$ pulses on both semiconductor spin qubit and superconducting quantum processor architectures. Moreover, we present a general overview of the hardware support for virtual $Z$ pulses. We find virtual $Z$ pulses (and thus, virtual $Z$ gates) can be used on hardware that, with previous methods, did not support the virtual $Z$ gate. Finally, we present two additional applications of virtual $Z$ pulses to pulse-level algorithms. First, broadening the class of Hamiltonians that can be natively simulated in an analogue manner. Second, increasing the expressibility of pulse-based variational quantum algorithms.

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Quantifying the advantages of applying quantum approximate algorithms to portfolio optimisation

We present a quantum algorithm for portfolio optimisation. Specifically, We present an end-to-end quantum approximate optimisation algorithm (QAOA) to solve the discrete global minimum variance portfolio (DGMVP) model. This model finds a portfolio of risky assets with the lowest possible risk contingent on the number of traded assets being discrete. We provide a complete pipeline for this model and analyses its viability for noisy intermediate-scale quantum computers. We design initial states, a cost operator, and ans\"atze with hard mixing operators within a binary encoding. Further, we perform numerical simulations to analyse several optimisation routines, including layerwise optimisation, utilising COYBLA and dual annealing. Finally, we consider the impacts of thermal relaxation and stochastic measurement noise. We find dual annealing with a layerwise optimisation routine provides the most robust performance. We observe that realistic thermal relaxation noise levels preclude quantum advantage. However, stochastic measurement noise will dominate when hardware sufficiently improves. Within this regime, we numerically demonstrate a favourable scaling in the number of shots required to obtain the global minimum -- an indication of quantum advantage in portfolio optimisation.

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Minimal evolution times for fast, pulse-based state preparation in silicon spin qubits

Standing as one of the most significant barriers to reaching quantum advantage, state-preparation fidelities on noisy intermediate-scale quantum processors suffer from quantum-gate errors, which accumulate over time. A potential remedy is pulse-based state preparation. We numerically investigate the minimal evolution times (METs) attainable by optimizing (microwave and exchange) pulses on silicon hardware. We investigate two state preparation tasks. First, we consider the preparation of molecular ground states and find the METs for H$_2$, HeH$^+$, and LiH to be 2.4 ns, 4.4 ns, and 27.2 ns, respectively. Second, we consider transitions between arbitrary states and find the METs for transitions between arbitrary four-qubit states to be below 50 ns. For comparison, connecting arbitrary two-qubit states via one- and two-qubit gates on the same silicon processor requires approximately 200 ns. This comparison indicates that pulse-based state preparation is likely to utilize the coherence times of silicon hardware more efficiently than gate-based state preparation. Finally, we quantify the effect of silicon device parameters on the MET. We show that increasing the maximal exchange amplitude from 10 MHz to 1 GHz accelerates the METs, e.g., for H$_2$ from 84.3 ns to 2.4 ns. This demonstrates the importance of fast exchange. We also show that increasing the maximal amplitude of the microwave drive from 884 kHz to 56.6 MHz shortens state transitions, e.g., for two-qubit states from 1000 ns to 25 ns. Our results bound both the state-preparation times for general quantum algorithms and the execution times of variational quantum algorithms with silicon spin qubits.

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Almost no experiments have classical Kirkwood-Dirac representations

A central problem in quantum information is determining quantum-classical boundaries. In the quasiprobability framework, a state is called classical if it is represented by a quasiprobability distribution that is positive, and thus a probability distribution. In recent years, the Kirkwood-Dirac (KD) distributions have gained much interest due to their numerous applications in modern quantum-information research. A particular advantage of the KD distributions is that they can be defined with respect to arbitrary observables. Here, we show that if two $d$-dimensional observables are picked at random, the set of classical (positive) states of the resulting KD distribution is a minimal polytope of dimension $2(d-1)$ with $2d$ explicitly known vertices. This implies minimality of the sets of KD-real observables, of KD-positive measurement elements and of KD-positivity-preserving unitaries. We show how these results have implications on robust observations of nonclassical phenomena, on classical simulations of quantum circuits, and on foundations of quantum theory.

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Quantifying the effect of gate errors on variational quantum eigensolvers for quantum chemistry

Variational quantum eigensolvers (VQEs) are leading candidates to demonstrate near-term quantum advantage. Here, we conduct density-matrix simulations of leading gate-based VQEs for a range of molecules. We numerically quantify their level of tolerable depolarizing gate-errors. We find that: (i) The best-performing VQEs require gate-error probabilities between $10^{-6}$ and $10^{-4}$ ( $10^{-4}$ and $10^{-2}$ with error mitigation) to predict, within chemical accuracy, ground-state energies of small molecules with $4-14$ orbitals. (ii) ADAPT-VQEs that construct ansatz circuits iteratively outperform fixed-circuit VQEs. (iii) ADAPT-VQEs perform better with circuits constructed from gate-efficient rather than physically-motivated elements. (iv) The maximally-allowed gate-error probability, $p_c$, for any VQE to achieve chemical accuracy decreases with the number $\ncx$ of noisy two-qubit gates as $p_c\approxprop\ncx^{-1}$. Additionally, $p_c$ decreases with system size, even with error mitigation, implying that larger molecules require even lower gate-errors. Thus, quantum advantage via gate-based VQEs is unlikely unless gate-error probabilities are decreased by orders of magnitude.

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Dynamic-ADAPT-QAOA: An algorithm with shallow and noise-resilient circuits

The quantum approximate optimization algorithm (QAOA) is an appealing proposal to solve NP problems on noisy intermediate-scale quantum (NISQ) hardware. Making NISQ implementations of the QAOA resilient to noise requires short ansatz circuits with as few CNOT gates as possible. Here, we present Dynamic-ADAPT-QAOA. Our algorithm significantly reduces the circuit depth and the CNOT count of standard ADAPT-QAOA, a leading proposal for near-term implementations of the QAOA. Throughout our algorithm, the decision to apply CNOT-intensive operations is made dynamically, based on algorithmic benefits. Using density-matrix simulations, we benchmark the noise resilience of ADAPT-QAOA and Dynamic-ADAPT-QAOA. We compute the gate-error probability $p_\text{gate}^\star$ below which these algorithms provide, on average, more accurate solutions than the classical, polynomial-time approximation algorithm by Goemans and Williamson. For small systems with $6-10$ qubits, we show that $p_{\text{gate}}^\star>10^{-3}$ for Dynamic-ADAPT-QAOA. Compared to standard ADAPT-QAOA, this constitutes an order-of-magnitude improvement in noise resilience. This improvement should make Dynamic-ADAPT-QAOA viable for implementations on superconducting NISQ hardware, even in the absence of error mitigation.

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Layering and subpool exploration for adaptive Variational Quantum Eigensolvers: Reducing circuit depth, runtime, and susceptibility to noise

Adaptive variational quantum eigensolvers (ADAPT-VQEs) are promising candidates for simulations of strongly correlated systems on near-term quantum hardware. To further improve the noise resilience of these algorithms, recent efforts have been directed towards compactifying, or layering, their ansatz circuits. Here, we broaden the understanding of the algorithmic layering process in three ways. First, we investigate the non-commutation relations between the different elements that are used to build ADAPT-VQE ans\"atze. Doing so, we develop a framework for studying and developing layering algorithms, which produce shallower circuits. Second, based on this framework, we develop a new subroutine that can reduce the number of quantum-processor calls by optimizing the selection procedure with which a variational quantum algorithm appends ansatz elements. Third, we provide a thorough numerical investigation of the noise-resilience improvement available via layering the circuits of ADAPT-VQE algorithms. We find that layering leads to an improved noise resilience with respect to amplitude-damping and dephasing noise, which, in general, affect idling and non-idling qubits alike. With respect to depolarizing noise, which tends to affect only actively manipulated qubits, we observe no advantage of layering.

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