arXiv subjects

Costin Iancu

Publications and source records attributed to Costin Iancu.

42 records · Page 3Linked to original sources

arXiv2021

Constant-Depth Circuits for Dynamic Simulations of Materials on Quantum Computers

Dynamic simulation of materials is a promising application for near-term quantum computers. Current algorithms for Hamiltonian simulation, however, produce circuits that grow in depth with increasing simulation time, limiting feasible simulations to short-time dynamics. Here, we present a method for generating circuits that are constant in depth with increasing simulation time for a subset of one-dimensional materials Hamiltonians, thereby enabling simulations out to arbitrarily long times. Furthermore, by removing the effective limit on the number of feasibly simulatable time-steps, the constant-depth circuits enable Trotter error to be made negligibly small by allowing simulations to be broken into arbitrarily many time-steps. Composed of two-qubit matchgates on nearest-neighbor qubits, these constant-depth circuits are constructed based on a set of multi-matchgate identity relationships. For an $N$-spin system, the constant-depth circuit contains only $\mathcal{O}(N^2)$ CNOT gates. When compared to standard Hamiltonian simulation algorithms, our method generates circuits with order-of-magnitude fewer gates, which allows us to successfully simulate the long-time dynamics of systems with up to 5 spins on available quantum hardware. This paves the way for simulations of long-time dynamics for scientifically and technologically relevant quantum materials, enabling the observation of interesting and important atomic-level physics.

quant-ph↗

arXiv2021

QFAST: Conflating Search and Numerical Optimization for Scalable Quantum Circuit Synthesis

We present a quantum synthesis algorithm designed to produce short circuits and to scale well in practice. The main contribution is a novel representation of circuits able to encode placement and topology using generic "gates", which allows the QFAST algorithm to replace expensive searches over circuit structures with few steps of numerical optimization. When compared against optimal depth, search based state-of-the-art techniques, QFAST produces comparable results: 1.19x longer circuits up to four qubits, with an increase in compilation speed of 3.6x. In addition, QFAST scales up to seven qubits. When compared with the state-of-the-art "rule" based decomposition techniques in Qiskit, QFAST produces circuits shorter by up to two orders of magnitude (331x), albeit 5.6x slower. We also demonstrate the composability with other techniques and the tunability of our formulation in terms of circuit depth and running time.

quant-ph↗

arXiv2020

Understanding Quantum Control Processor Capabilities and Limitations through Circuit Characterization

Continuing the scaling of quantum computers hinges on building classical control hardware pipelines that are scalable, extensible, and provide real time response. The instruction set architecture (ISA) of the control processor provides functional abstractions that map high-level semantics of quantum programming languages to low-level pulse generation by hardware. In this paper, we provide a methodology to quantitatively assess the effectiveness of the ISA to encode quantum circuits for intermediate-scale quantum devices with O($10^2$) qubits. The characterization model that we define reflects performance, the ability to meet timing constraint implications, scalability for future quantum chips, and other important considerations making them useful guides for future designs. Using our methodology, we propose scalar (QUASAR) and vector (qV) quantum ISAs as extensions and compare them with other ISAs in metrics such as circuit encoding efficiency, the ability to meet real-time gate cycle requirements of quantum chips, and the ability to scale to more qubits.

quant-ph↗

arXiv2020

QFAST: Quantum Synthesis Using a Hierarchical Continuous Circuit Space

We present QFAST, a quantum synthesis tool designed to produce short circuits and to scale well in practice. Our contributions are: 1) a novel representation of circuits able to encode placement and topology; 2) a hierarchical approach with an iterative refinement formulation that combines "coarse-grained" fast optimization during circuit structure search with a good, but slower, optimization stage only in the final circuit instantiation stage. When compared against state-of-the-art techniques, although not optimal, QFAST can generate much shorter circuits for "time dependent evolution" algorithms used by domain scientists. We also show the composability and tunability of our formulation in terms of circuit depth and running time. For example, we show how to generate shorter circuits by plugging in the best available third party synthesis algorithm at a given hierarchy level. Composability enables portability across chip architectures, which is missing from the available approaches.

quant-ph↗

arXiv2019

Heuristics for Quantum Compiling with a Continuous Gate Set

We present an algorithm for compiling arbitrary unitaries into a sequence of gates native to a quantum processor. As accurate CNOT gates are hard for the foreseeable Noisy- Intermediate-Scale Quantum devices era, our A* inspired algorithm attempts to minimize their count, while accounting for connectivity. We discuss the search strategy together with metrics to expand the solution frontier. For a workload of circuits with complexity appropriate for the NISQ era, we produce solutions well within the best upper bounds published in literature and match or exceed hand tuned implementations, as well as other existing synthesis alternatives. In particular, when comparing against state-of-the-art available synthesis packages we show 2.4x average (up to 5.3x) reduction in CNOT count. We also show how to re-target the algorithm for a different chip topology and native gate set, while obtaining similar quality results. We believe that empirical tools like ours can facilitate algorithmic exploration, gate set discovery for quantum processor designers, as well as providing useful optimization blocks within the quantum compilation tool-chain.

cs.ET↗

arXiv2017

Report of the HPC Correctness Summit, Jan 25--26, 2017, Washington, DC

Maintaining leadership in HPC requires the ability to support simulations at large scales and fidelity. In this study, we detail one of the most significant productivity challenges in achieving this goal, namely the increasing proclivity to bugs, especially in the face of growing hardware and software heterogeneity and sheer system scale. We identify key areas where timely new research must be proactively begun to address these challenges, and create new correctness tools that must ideally play a significant role even while ramping up toward exacale. We close with the proposal for a two-day workshop in which the problems identified in this report can be more broadly discussed, and specific plans to launch these new research thrusts identified.

cs.DC↗