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Debarpita Banerjee

Publications and source records attributed to Debarpita Banerjee.

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FORSLICE: An Automated Formal Framework for Efficient PRB-Allocation towards Slicing Multiple Network Services

Network slicing is a modern 5G technology that provides efficient network experience for diverse use cases. It is a technique for partitioning a single physical network infrastructure into multiple virtual networks, called slices, each equipped for specific services and requirements. In this work, we particularly deal with radio access network (RAN) slicing and resource allocation to RAN slices. In 5G, physical resource blocks (PRBs) being the fundamental units of radio resources, our main focus is to allocate PRBs to the slices efficiently. While addressing a spectrum of needs for multiple services or the same services with multi-priorities, we need to ensure two vital system properties: i) fairness to every service type (i.e., providing the required resources and a desired range of throughput) even after prioritizing a particular service type, and ii) PRB-optimality or minimizing the unused PRBs in slices. These serve as the core performance evaluation metrics for PRB-allocation in our work. We adopt the 3-layered hierarchical PRB-partitioning technique for allocating PRBs to network slices. The case-specific, AI-based solution of the state-of-the-art method lacks sufficient correctness to ensure consistent system performance. To achieve guaranteed correctness and completeness, we leverage formal methods and propose the first approach for a fair and optimal PRB distribution to RAN slices. We formally model the PRB-allocation problem as a 3-layered framework, FORSLICE, specifically by employing satisfiability modulo theories. Next, we apply formal verification to ensure that the desired system properties: fairness and PRB-optimality, are satisfied by the model. The proposed method offers an efficient, versatile and automated approach compatible with all 3-layered hierarchical network structure configurations, yielding significant system property improvements compared to the baseline.

cs.NI

Precision Switching Schedule for Efficient Control Implementations

Modern cyber-physical systems, such as automotive control, rely on feedback controllers that regulate the system towards desired a setpoint. In practice, however, the controller must also be scheduled efficiently on resource-constrained processors, where the choice of numerical precision for controller implementation directly affects both control quality and computational cost. This trade-off is critical: higher precision improves control performance but increases runtime, while lower precision executes faster in the processor but may degrade overall system performance. In this work, we propose the first approach for a precision switching schedule, where the controller switches between different floating-point precisions to balance control performance and enhance computational efficiency. We formulate this problem as a multi-objective optimization, expressed as a Mixed-Integer Quadratic Program (MIQP) with sound linearizations and error bounds that capture roundoff effects from different precision implementations. Our method efficiently computes a switching schedule that ensures the system output remains within a specified reference band. Through experimental evaluation on standard benchmark control systems, we demonstrate that switching between 32-bit and 16-bit floating-point implementations offers an average runtime reduction of 26.5% compared to 32-bit execution and a 27.6% improvement in control performance over 16-bit execution, while maintaining near-optimal overall performance.

eess.SY